A New, Low-Cost, Dual H-Bridge Motor Driver IC

Category: Motor and general control schematics
Manufacture: Allegro Micro Systems, Inc.
Datasheet: Download this application note

Technical Paper STP 98-9
by Thomas Truax and Robert Stoddard ABSTRACT A new dual H-bridge motor driver IC has been developed to address the universal need to reduce the cost of driving a bipolar stepper motor. This paper will present this new dual H-bridge motor driver, which includes several unique circuit design features. These features, including a new bipolar power output structure, will be explained in detail. This paper will also discuss the decisions behind the various design and system trade-offs that were necessary to minimize cost. INTRODUCTION It is well known that driving a stepper motor in a bipolar mode (i.e., the motor is stepped by reversing current in a motor winding) is more efficient than driving in a unipolar mode. In fact, for the same motor power dissipation, the bipolar mode provides 40% higher torque compared to the unipolar mode. However, driving a stepper motor in bipolar mode requires more complex circuitry than unipolar mode. Typically, two H-bridges and current-control circuitry are needed to drive a bipolar stepper motor. Fortunately, today there are numerous motor-driver ICs that provide the necessary power H-bridge drivers. Many of these motor-driver ICs feature two H-bridges, and many also provide current-control circuitry. Stepper motor users still have to make a cost/benefit analysis of the improved torque with the bipolar drive mode verses the increased cost of the drive electronics. Therefore, there is a constant market need to reduce the cost of bipolar stepper motor-driver ICs. The A3966 dual H-bridge motor-driver IC was developed specifically to provide a very low cost solution for driving bipolar stepper motors. MINIMIZING COSTS The principal objective of this development project was to produce a power IC that would meet the majority of bipolar stepper driver applications with the lowest possible cost. Reducing cost was the key theme for each decision made throughout both the product definition and actual design phases of the A3966. To satisfy the basic needs of driving a bipolar stepper motor with the most cost-effective solution, the following basic development goals were established for the A3966: -- provide two full H-bridges, -- integrate current-control circuitry, -- utilize cost effective package, and -- minimize external components. Providing both power H-bridges in one IC would maximize the well-known advantages of integration. However, because the A3966 would have to dissipate the power of two H-bridges, the power outputs would have to be optimized for low saturation voltages to reduce the onchip power dissipation. The output drivers would need to be rated for at least 500 mA and 30 V. The 30 V rating would allow the use of the cost-effective DABiC4 process (described later). By not having to increase the chip size for a higher voltage rating, the principle goal of minimizing cost while satisfying the maximum number of bipolar stepper motor applications would still be met. Internal ground-clamp and flyback diodes would be provided to eliminate the need for external diodes. This low-cost motor-driver IC would also feature an internal current-control circuit. To minimize both the number of external components and the package pin count, a fixed-frequency, pulse-width modulated (PWM) topology would be implemented. With a fixed-frequency topology, only one external RC network is needed to set up the PWM frequency. Additional external filtering
components would not be needed, as the A3966 would incorporate a patented circuit that uses the capacitor in the RC timing network to also set a user-selectable blanking window that prevents false triggering of the PWM current-control circuitry during switching transients. Generally, in the IC industry, the cost of an IC package is proportional to its size (i.e., the higher the number of pins, the more expensive). To minimize cost, the smallest possible package would be used for the A3966. The bare minimum of functional pins needed for A dual H-bridge motor driver IC with PWM current control is: Pins Needed two outputs per bridge 4 phase & enable logic inputs for each bridge 4 sense connection for each bridge 2 logic supply 1 motor supply 1 reference input 1 RC timing pin 1 ground 1 Minimum Pins Needed 15 The 16-lead SOIC package and 16-pin dual in-line package (DIP) were targeted. Both of these packages are produced in very high volumes and are reasonably low cost. In order to keep the pin count at sixteen, several desirable, but not necessary, features were eliminated. Limiting the number of features also kept the cost of the silicon to a minimum. Because the A3966 is a power IC, the power dissipation capabilities of the package also had to be considered. For the surface-mount package version, a reasonable compromise was reached by using a modified 16-lead SOIC package with two leads used as heat sink tabs (thus using all 16 available pins). For the through hole package version, the standard 16-pin DIP with a copper lead frame was used as it has a reasonable thermal capability for the lowest cost.
FUNCTIONAL DESCRIPTION Logic Inputs For each bridge of the IC, a PHASE input controls the load-current polarity by selecting the appropriate sourcedriver and sink-driver pair. An ENABLE input, when held high, disables all the power outputs for that bridge. A logic low on the ENABLE input turns on the selected source and sink driver pair of that H-bridge (see figure 1). H-bridge Power Outputs As noted above, the H-bridge power outputs are rated for operating voltages up to 30 V. To reduce the on-chip power dissipation, the sink driver outputs in particular have been optimized for low saturation voltages. The A3966 PWM topology only chops the source drivers, and therefore the sink drivers are always on during the PWM chop cycle (see figure 2). Optimizing the sink drivers for low saturation voltages gave the biggest return for die size utilization. The sink drivers feature a patented SatlingtonTM output structure. The Satlington outputs combine the low voltage drop of a saturated transistor and the high peak current capability of a Darlington. Figure 3 shows a representative circuit of the Satlington. To achieve a low output-voltage drop, a comparatively large current source I1 (~17 mA) is used to drive the base of Q1. This produces the low output-voltage drop that is typical of a saturated transistor for low-tomoderate current levels. To achieve a higher output-current capability, a comparatively small current source I2 (~1 mA) is used to drive the base of Q2. When Q1 starts to come out of saturation at high load current levels, I2 and Q2 provide an increase in base drive current to Q1 (Q1 and Q2 operate as a Darlington). This allows Q1 to achieve a much higher output-current capability at a somewhat increased output voltage drop (essentially an additional VBE). When Q1 is saturated, the anti-inverse conduction clamp circuit diverts the I2 current source. This prevents Q2 from inversely conducting, which would divert base drive current from Q1.
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