Details, datasheet, quote on part number: ADL5205ACPZ-R7
PartADL5205ACPZ-R7
Category
TitleRF Amplifier Prog Driver with Low o/p Impedance
Description

Analog Devices ADL5205 is designed as a wide bandwidth, digitally-controlled, variable dual gain amplifier (DGA). Developed using Analog Devices high speed, silicon germanium (SiGe) complementary BiCMOS process, the ADL5205 has precise gain adjustment capabilities with good distortion performance. The ADL5205 offers precise gain control, a near constant noise figure for the first 12dB of attenuation, and a high output third-order intercept (OIP3). ADL5205's 48.5dBm OIP3 performance makes the ADL5205 an excellent gain control device for receiver applications. The ADL5205 DGA offers a broad 35dB gain range with a 1dB step size for wide input dynamic range applications. Adjustable gain is made possible through multiple gain control and interface options. These options include parallel, SPI, and gain step up/down control. ADL5205s typical quiescent current is 175mA for high-performance mode and 135mA for low-power mode. When disabled, the ADL5205 consumes only 14mA and offers excellent input to output isolation. The amplifier preserves the gain setting when the device is disabled



CompanyAnalog Devices
DatasheetDownload ADL5205ACPZ-R7 datasheet
  
ADL5205ACPZ-R7 photo

Others parts numbering
ADL5205-EVALZ: RF Development Tools Eval Board
EVAL-SDP-CS1Z: Other Development Tools EVAL-SDP-CS1Z

 

Features, Applications
FEATURES
SPI WITH FA, PARALLEL WITH LATCH, UP/DOWN PWUPA VPOS

Dual, independent, digitally controlled gain amplifier (DGA) +26 dB gain range 1 dB step size, 0.2 dB accuracy at 200 MHz 100 differential input resistance 10 differential output resistance 1.2 dB change in noise figure for first dB of gain reduction Output third-order intercept (OIP3): 48.5 dBm at 200 MHz, 5 V, high performance mode -3 dB bandwidth: 1700 MHz typical in high performance mode Multiple control interface options Parallel 6-bit control interface with latch Serial peripheral interface (SPI) with fast attack Gain step up/down interface Wide input dynamic range Low power mode Power-down control Single 5 V supply operation 6 mm LFCSP package

SPI WITH FA, PARALLEL WITH LATCH, UP/DOWN PWUPB GND
APPLICATIONS

Differential analog-to-digital converter (ADC) drivers High intermediate frequency (IF) sampling receivers High output power IF amplification Instrumentation

The is a digitally controlled, wide bandwidth, variable gain dual amplifier (DGA) that provides precise gain control, high output third-order intercept (OIP3) and a near constant noise figure for the first dB of attenuation. The excellent OIP3 performance of 48.5 dBm (at 200 MHz, 5 V, high performance mode, and maximum gain) makes the ADL5205 an excellent gain control device for a variety of receiver applications. For wide input dynamic range applications, the ADL5205 provides a broad 35 dB gain range with 1 dB step size. The gain is adjustable through multiple gain control and interface options: parallel, SPI, or gain step up/down control. The two channels of the ADL5205 can be powered up independently by applying the appropriate logic level to the PWUPA and PWUPB pins. The quiescent current of the ADL5205 is typically 175 mA for high performance mode and 135 mA for

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low power mode. When disabled, the ADL5205 consumes only 14 mA and offers excellent input to output isolation. The gain setting is preserved when the device is disabled. Fabricated on the Analog Devices, Inc., high speed, silicon germanium (SiGe) complementary BiCMOS process, the ADL5205 provides precise gain adjustment capabilities with good distortion performance. The ADL5205 amplifier comes in a compact, thermally enhanced, 6 mm, 40-lead LFCSP package and operates over the temperature range to +85C. Note that throughout this data sheet, multifunction pins, such as CSA/A3, are referred to by the entire pin name by a single function of the pin, for example, CSA, when only that function is relevant.

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ADL5205 Material Declaration PCN-PDN Information Quality And Reliability Symbols and Footprints

Application Notes AN-1363: Meeting Biasing Requirements of Externally Biased RF/Microwave Amplifiers with Active Bias Controllers Data Sheet ADL5205: Dual, 35 dB Range, 1 dB Step Size DGA Data Sheet

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Features.............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram.............................................................. 1 General Description......................................................................... 1 Revision History............................................................................... 2 Specifications..................................................................................... 3 Timing Specifications.................................................................. 5 Absolute Maximum Ratings............................................................ 6 Thermal Resistance...................................................................... 6 Junction to Board Thermal Impedance..................................... 6 ESD Caution.................................................................................. 6 Pin Configuration and Function Descriptions............................. 7 Typical Performance Characteristics............................................. 9 Theory of Operation...................................................................... 17 Basic Structure............................................................................ 17 Control/Logic Circuitry............................................................. 17 Common-Mode Voltage............................................................ 17 Applications Information.............................................................. 18 Basic Connections...................................................................... 18 Digital Interface Overview........................................................ 19

SPI Read....................................................................................... 20 ADC Interfacing......................................................................... 21 Noise Figure vs. Gain Setting.................................................... 21 Evaluation Board............................................................................ 22 Overview..................................................................................... 22 Power Supply Interface.............................................................. 22 Signal Inputs and Outputs......................................................... 23 Manual Controls......................................................................... 23 Parallel Interface......................................................................... 24 Serial Interface............................................................................ 24 Standard Development Platform (SDP) Interface................. 25 Evaluation Board Control Software......................................... 25 Command Line Control Program............................................ 25 Graphical User Interface (GUI) Program............................... 25 Evaluation Board Schematics and Layout................................... 27 Bill of Materials........................................................................... 30 Outline Dimensions....................................................................... 31 Ordering Guide.......................................................................... 31


 

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