|Title||OSC TCXO 32.768KHZ LVCMOS SMD|
SiTime's TempFlat™ MEMS technology enables the first 32 kHz TCXO in a 1.2 mm2 chip-scale package, the world's smallest footprint. Typical core supply current is only 1 μA. And unlike standard oscillators, the SiT1552 features NanoDrive™, a factory programmable output that reduces voltage swing to minimize power. The SiT1552 is factory calibrated over multiple temperature points to guarantee extremely tight frequency stability from ±10 ppm to ±20 ppm (initial + over temperature).
|Datasheet||Download SIT1552AC-JE-DCC-32.768D datasheet
|Others parts numbering|
|SIT6098_1552AI-JE-DCC-327680: EVAL BOARD SIT1552 1.5X0.8MM|
32.768 kHz ±10, ±20 ppm frequency stability options over temp World's smallest TCXO 0.8 mm CSP Operating temperature ranges: to +85°C
Smart Meters (AMR) Health and Wellness Monitors Pulse-per-Second (pps) Timekeeping RTC Reference Clock
Ultra-low power: <1 µA Vdd supply range: to 3.63V Improved stability reduces system power with fewer network timekeeping updates NanoDriveTM programmable output swing for lowest power and direct XTAL SoC input interface Internal filtering eliminates external Vdd bypass cap and saves space Pb-free, RoHS and REACH compliant
Parameter Symbol Min. Typ. Max. Unit Condition Frequency and Stability Output Frequency Stability Over Temperature  (without Initial Offset ) Frequency Stability Over Temperature (with Initial Offset ) Frequency Stability vs Voltage First Year Frequency Aging 10-year Aging 20-year Aging F_aging Fout -5.0 F_stab -10 -20 F_stab -13 -22 F_vdd ppm = 25°C, Vdd to 3.3V ppm kHz Stability part number code = E Stability part number code = F Stability part number code = 1 Stability part number code = E Stability part number code = F Stability part number code 3.63V
Jitter Performance (TA = over temp) Long Term Jitter Period Jitter Vdd Idd t_Vdd_ Ramp 180 Start-up Time at Power-up t_start 35 2.5 µspp nsRMS 81920 cycles (2.5 sec), 100 samples Cycles = 25°C, Vdd 3.63V
Supply Voltage and Current Consumption Operating Supply Voltage Core Supply Current  Power-Supply Ramp Notes: 1. No board level underfill. Measured as peak-to-peak/2. Inclusive of 3x-reflow and ±20% load variation. Tested with Agilent 53132A frequency counter. Due to the low operating frequency, the gate time must ms to ensure an accurate frequency measurement. 2. Initial offset is defined as the frequency deviation from the ideal 32.768 kHz at room temperature, post reflow. 3. Core operating current does not include output driver operating current or load current. To derive total operating current (no load), add core operating current + output driver operating current, which is a function of the output voltage swing. See the description titled, Calculating Load Current. = 25°C, Vdd = 1.8V, LVCMOS Output configuration, No Load to +85°C, Vdd 3.63V, No Load Vdd Ramp-Up to 90% Vdd, -40°C +60°C, valid output to +70°C, valid output to +85°C, valid output
Parameter Commercial Temperature Industrial Temperature Symbol Min. Typ. Max. 70 85 LVCMOS Output Rise/Fall Time Output Clock Duty Cycle Output Voltage High Output Voltage Low tr, tf DC VOH VOL % V Vdd: 3.63V. IOH 15 pF Load Vdd: 3.63V. IOL 15 pF Load 10-90% (Vdd), 15 pF Load 10-90% (Vdd), 5 pF Load, Vdd 1.62V Unit °C Condition Operating Temperature Range Op_Temp
NanoDriveTM Programmable, Reduced Swing Output Rise/Fall Time Output Clock Duty Cycle tf, % SiT1552 does not internally AC-couple. This output description is intended for a receiver that is AC-coupled. See Table x for acceptable NanoDrive swing options. Vdd: 10 pF Load, IOH / IOL ±0.2 A. Vdd: 3.63V. IOH 10 pF Load. See Table 1 for acceptable VOH/VOL setting levels. Vdd: 3.63V. IOL 10 pF Load. See Table 1 for acceptable VOH/VOL setting levels. to +85°C, Vdd 3.63V. 30-70% (VOL/VOH), 10 pF Load
AC-coupled Programmable Output Swing DC-Biased Programmable Output Voltage High Range DC-Biased Programmable Output Voltage Low Range Programmable Output Voltage Swing Tolerance
CSP Pin 1, 4 Symbol GND I/O Power Supply Ground Functionality Connect to ground. All GND pins must be connected to power supply ground. The GND pins can be connected together, as long as both GND pins are connected ground. Oscillator clock output. When interfacing to an MCU's XTAL, the CLK Out is typically connected to the receiving IC's X IN pin. The SiT1552 oscillator output includes an internal driver. As a result, the output swing and operation is not dependent on capacitive loading. This makes the output much more flexible, layout independent, and robust under changing environmental and manufacturing conditions. Connect to power supply 1.5V Vdd 3.63V. Under normal operating conditions, Vdd does not require external bypass/decoupling capacitor(s). For more information about the internal power-supply filtering, see Power-Supply Noise Immunity section in the detailed description. Contact factory for applications that require a wider operating supply voltage range.
Attempted operation outside the absolute maximum ratings cause permanent damage to the part. Actual performance of the IC is only guaranteed within the operational specifications, not at absolute maximum ratings.
Parameter Continuous Power Supply Voltage Range (Vdd) Short Duration Maximum Power Supply Voltage (Vdd) Continuous Maximum Operating Temperature Range Short Duration Maximum Operating Temperature Range Human Body Model (HBM) ESD Protection Charge-Device Model (CDM) ESD Protection Machine Model (MM) ESD Protection Latch-up Tolerance Mechanical Shock Resistance Mechanical Vibration Resistance 1508 CSP Junction Temperature Storage Temperature Mil 883, Method 2002 Mil 883, Method 2007 30 minutes Vdd - 3.63V Vdd 3.63V, 30 mins A115 JESD78 Compliant g °C Test Condition Value -0.5 to Unit °C V
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