Details, datasheet, quote on part number: TPS65917EVM
PartTPS65917EVM
Category
TitlePower Management IC Development Tools TPS65917-Q1 Power Management IC Evaluation Module
Description
CompanyTexas Instruments Inc.
DatasheetDownload TPS65917EVM datasheet
  
TPS65917EVM photo

Others parts numbering
O917A130TRGZTQ1: Power Management Specialised - PMIC Automotive 3.15V to 5.5V, 5 Buck & 5 LDO Power Management IC (PMIC) 48-VQFN -40 to 105
O917A130TRGZRQ1

 

Features, Applications

This user's guide describes the characteristics, operation, and use of the TPS65903x-Q1 EVM. An EVM description, graphical user interface (GUI) description, interface requirements, and complete schematic are included.

Powered EVM................................................................................................................ 4 TPS65917-Q1 EVM Schematic (Page 5 TPS65917-Q1 EVM Schematic (Page 6 TPS65917-Q1 EVM Schematic (Page 7 TPS65917-Q1 EVM Schematic (Page 4)................................................................................. 8 Composite - Top View..................................................................................................... 12 Top Layer

Layer 1 GND................................................................................................................ 13 Layer 2 SIGNAL............................................................................................................ 14 Layer 3 POWER............................................................................................................ 14 Bottom Layer................................................................................................................ 15 Composite - Bottom View

Default GPIO Configuration............................................................................................... 16 GPIO Configuration After GPIO_1 Set to Logic High Low Level Configuration Page............................................................................................ 18 Sample Script............................................................................................................... 19 List of Tables

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The TPS65917-Q1 device is a power-management integrated circuit (PMIC) for automotive applications. The device provides five configurable step-down converters, with A of output current for memory, processor core, input/output (I/O), or preregulation of LDOs. The TPS65917-Q1 device contains 5 LDO regulators for external use. For more details, see the device data sheet, TPS65917-Q1 Power Management Unit (PMU) for Processor.

SLIU020A ­ September 2016 ­ Revised March 2017 Submit Documentation Feedback

The features of this EVM are as follows: Allows monitoring of all LDO and SMPS output voltages. Allows loading of all SMPS outputs. Allows access to the GPIOs and other logic signals to test functionality. Optimized layout for stable operation of all SMPS. Onboard MSP430 to enable communication with the PMIC. Graphical User Interface (GUI) on Windows® to allow access to the registers of the PMIC through USB-I2C.

Figure 1. EVM LEDs Display status of POWERGOOD, RESET_IN, POWER_HOLD, LDOVRTC_OUT, RESET_OUT, INT, and power supply of MSP430 USB Connection PC to enable communication through the GUI MSP430 Microcontroller used to convert USB data to I2C format SMPSxx Monitor point for SMPS outputs LDO Outputs Monitor point for LDO outputs VIO SelectorX Jumper used to select VIO voltage. P12 requires a jumper installed, and by default pins 11 and 12 are shorted to select external V as VIO. Only one jumper should be installed between P12 and P15. GPIOs Jumper that provides access to the GPIOs VSYS power supply input. P16 is the same connector as SMPS12_OUT and must not be confused to prevent applying VSYS to SMPS-output.

Table 1 describes the default jumper settings for the TPS65917-Q1 EVM. No changes should be made to these settings without consulting the TPS65917-Q1 EVM schematic. Table 1. Default Jumper Settings for TPS65917-Q1EVM

JUMPER JP6 JP7 VIO Selection VIO Selection POWERGOOD Pull-up resistor Level Shifter Voltage Selection I2C or SPI CLK I2C or SPI Data GPIO_1 GUI Control GPIO_5 Selection BOOT Selection PWRON Selection LDO5 Input Selection I2C_SCL Connection to PMIC I2C_SDA Connection to PMIC Level Shifter Direction Selection and Enable LDO Input Selection VCC_SENSE Selection D2 Indicator Selection D5 Indicator Selection D7 Indicator Selection PURPOSE EVM CONFIGURATION Pins 11 and 12 are shorted to select external 1.8V as VIO No pins on this header are shorted since there is a shunt J2 is closed to enable the pull-up resistor for the POWERGOOD signal J3 is closed to select VIO as the level shifted voltage for U5, U6, and J7 is closed to select the I2C_SCL signal J10 is closed to select the I2C_SDA signal J22 is closed to allow GPIO_1 (RESET_IN) to be controlled through the GUI GPIO_5 is shorted HIGH to allow the device to power-up BOOT is shorted LOW to exercise the default power-up sequence PWRON is shorted HIGH J32 is closed to supply LDO5 from the same supply as the other LDOs J35 is closed to use the onboard SCL signal from the J36 is closed to use the onboard SDA signal from the MSP430 Jumpers J43 through J54 should be left as they are configured to enable proper level shifter functionality JP1 is closed to supply the LDOs from VSYS instead of an external supply (VDD) VCC_SENSE is shorted to VSYS instead of an external supply (VDD) Pins 1 and 2 are shorted to allow the status of POWERGOOD signal to be indicated by D2 Pins 1 and 2 are shorted to allow the status of the POWER_HOLD signal to be indicated by D5 Pins 1 and 2 are shorted to allow the status of the RESET_IN signal to be indicated by D7


 

Some Part number from the same manufacture Texas Instruments Inc.
O917A130TRGZTQ1
O917A130TRGZRQ1
 
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