Details, datasheet, quote on part number: NCV5700DR2G
PartNCV5700DR2G
CategorySemiconductors => Power Management ICs => Gate Drivers => 8844068
TitleGate Drivers HIGH CURRENT IGBT GATE DR
Description
CompanyON Semiconductor
DatasheetDownload NCV5700DR2G datasheet
Specifications 
Product CategoryGate Drivers
ManufacturerON Semiconductor
Mounting StyleSMD/SMT
Package/CaseSO-16
ProductIGBT, MOSFET Gate Drivers
Number of Drivers1 Driver
Output Current6.8 A, 7.8 A
ConfigurationHigh Side/Low Side
Rise Time9.2 ns
Fall Time7.9 ns
Supply Voltage - Max20 V
Supply Voltage - Min-
Operating Supply Current900 uA
Minimum Operating Temperature- 40 C
Maximum Operating Temperature+ 125 C
TypeHigh Current IGBT Gate Driver
PackagingCut Tape
BrandON Semiconductor
Maximum Turn-Off Delay Time75 ns
Maximum Turn-On Delay Time75 ns
Number of Outputs1 Output
Output Voltage5 V
Pd - Power Dissipation900 mW
ShutdownShutdown
Factory Pack Quantity2500
Unit Weight142 mg
NCV5700DR2G photo

 

Features, Applications

The is a high-current, high-performance stand-alone IGBT driver for high power applications that include solar inverters, motor control and uninterruptable power supplies. The device offers a cost-effective solution by eliminating many external components. Device protection features include Active Miller Clamp, accurate UVLO, EN input, DESAT protection and Active Low FAULT output. The driver also features an accurate 5.0 V output and separate high and low (VOH and VOL) driver outputs for system design convenience. The driver is designed to accommodate a wide voltage range of bias supplies including unipolar and bipolar voltages. It is available a 16-pin SOIC package.

High Current Output A) at IGBT Miller Plateau Voltages Low Output Impedance of VOH & VOL for Enhanced IGBT Driving Short Propagation Delays with Accurate Matching Direct Interface to Digital Isolator/Opto-coupler/Pulse Transformer for Isolated Drive, Logic Compatibility for Non-isolated Drive Active Miller Clamp to Prevent Spurious Gate Turn-on DESAT Protection with Programmable Delay Enable Input for Independent Driver Control Tight UVLO Thresholds for Bias Flexibility Wide Bias Voltage Range including Negative VEE Capability NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC-Q100 Qualified and PPAP Capable, Grade 1 This Device is Pb-Free, Halogen-Free and RoHS Compliant Motor Control Uninterruptible Power Supplies (UPS) Automotive Power Supplies HEV/EV Powertrain HEV/EV PTC Heaters

= Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package

EN VIN VREF FLT GNDA NC RSVD NC (Top View) 16 CLAMP 15 VEEA 14 VEE 13 GND 12 VOL 11 VOH 10 VCC 9 DESAT

Typical Applications
See detailed ordering and shipping information on page 6 of this data sheet.

Pin Name EN VIN No. 1 2 I/O/x I Description Enable input allows additional gating of VOH and VOL, and can be used when the driver output needs to be turned off independent of the Microcontroller input. Input signal to control the output. In applications which require galvanic isolation, VIN is generated at the opto output, the pulse transformer secondary or the digital isolator output. There is a signal inversion from VIN to VOH/VOL. VIN is internally clamped 5.5 V and has a pull-up resistor MW to ensure that output is low in the absence of an input signal. A minimum pulse-width is required at VIN before VOH/VOL are activated. 5 V Reference generated within the driver is brought out to this pin for external bypassing and for powering low bias circuits (such as digital isolators). Fault output (active low) that allows communication to the main controller that the driver has encountered a fault condition and has deactivated the output. Truth Table is provided in the datasheet to indicate conditions under which this signal is asserted. Capable of driving optos or digital isolators when isolation is required. This pin provides a convenient connection point for bypass capacitors (e.g REF) on the left side of the package. Pins not internally connected. Reserved. No connection is allowed. Input for detecting the desaturation of IGBT due to a fault condition. A capacitor connected to this pin allows a programmable blanking delay every ON cycle before DESAT fault is processed, thus preventing false triggering. Positive bias supply for the driver. The operating range for this pin is from UVLO to the maximum. A good quality bypassing capacitor is required from this pin to GND and should be placed close to the pins for best results. Driver high output that provides the appropriate drive voltage and source current to the IGBT gate. Driver low output that provides the appropriate drive voltage and sink current to the IGBT gate. VOL is actively pulled low during start-up and under Fault conditions. This pin should connect to the IGBT Emitter with a short trace. All power pin bypass capacitors should be referenced to this pin and kept at a short distance from the pin. A negative voltage with respect to GND can be applied to this pin and that will allow VOL to a negative voltage during OFF state. A good quality bypassing capacitor is needed from VEE to GND. If a negative voltage is not applied or available, this pin must be connected to GND. Analog version of the VEE pin for any signal trace connection. VEE and VEEA are internally connected. Provides clamping for the IGBT gate during the off period to protect it from parasitic turn-on. To be tied directly to IGBT gate with minimum trace length for best results.


 

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