Details, datasheet, quote on part number: SN74LVC1G3157DBVR
CategorySemiconductors => Switches and Multiplexers => Analog Switches/Muxes
Part familySN74LVC1G3157 Single-Pole, Double-Throw Analog Switch
TitleAnalogue Switch ICs SPDT Analog Switch
DescriptionSingle-Pole, Double-Throw Analog Switch 6-SOT-23 -40 to 125
CompanyTexas Instruments Inc.
DatasheetDownload SN74LVC1G3157DBVR datasheet
Cross ref.Similar parts: 74LVC1G157GV, 74LVC1G157GV,125, 74LVC1G157GV/S500, 74LVC1G3157GV
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Number of Switches1 Switch
Configuration1 x SPDT
On Resistance - Max15 Ohms
Switch Voltage - Max4.5 V
On Time - Max5.7 ns
Off Time - Max3.8 ns
Operating Supply Voltage1.65 V to 5.5 V
Maximum Operating Temperature+ 125 C
Mounting StyleSMD/SMT
PackagingCut Tape, eel, Reel
  Mecanical Data
Pin nbPackage typeInd stdJEDEC codePackage qtyCarrierDevice markWidth (mm)Length (mm)Thick (mm)Pitch (mm)
Application notes
• LVC Characterization Information
This document provides characterization information about low-voltage logic (LVL) that operates from a 3.3-V power supply. It addresses the issues of interfacing to 5-V logic, ac performance, power considerations, input and output characteristics, and sign | Doc
• Use of the CMOS Unbuffered Inverter in Oscillator Circuits
CMOS devices have a high input impedance, high gain, and high bandwidth. These characteristics are similar to ideal amplifier characteristics and, hence, a CMOS buffer or inverter can be used in an oscillator circuit in conjunction with other passive compo | Doc
Spice Model
HSPICE Model of SN74LVC1G3157 - ZIP (03/09/2004)

Others parts numbering
SN74LVC1G3157DRYR: Analogue Switch ICs SNGL Pole Double Throw Analog Switch
SN74LVC1G3157DRY2: Analogue Switch ICs SGL-Pole Dbl-Throw Analog Switch
74LVC1G3157DCKRG4: Analogue Switch ICs Sngl-Pole Dbl-Throw Analog Switch
SN74LVC1G3157DTBR: Analogue Switch ICs Single-Pole, Double-Throw Analog Switch 6-X2SON -40 to 125
74LVC1G3157DBVRE4: Analogue Switch ICs Sngl-Pole Dbl-Throw Analog Switch


Features, Applications


to 5.5-V VCC Operation Useful for Both Analog and Digital Applications Specified Break-Before-Make Switching Rail-to-Rail Signal Handling High Degree of Linearity High Speed, Typically 0.5 ns (VCC = 50 pF)

Low On-State Resistance, Typically 6 (VCC 4.5 V) Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 2000-V Human-Body Model 200-V Machine Model 1000-V Charged-Device Model (C101)

This single-pole double-throw (SPDT) analog switch is designed for to 5.5-V VCC operation. The SN74LVC1G3157 can handle both analog and digital signals. The device permits signals with amplitudes up to VCC (peak) to be transmitted in either direction. Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NanoFree is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

ORDERABLE PART NUMBER Reel of 3000 Reel of 5000 Reel of 5000 Reel of 3000 Reel of 3000 Reel SN74LVC1G3157DCKR SN74LVC1G3157DRLR

NanoFreeTM WCSP (DSBGA) 0.23-mm Large Bump YZP (Pb-free) SON DRY to 85C SON DSF SOT (SOT-23) DBV SOT (SC-70) DCK SOT (SOT-553) DRL (2) (3)

Package drawings, thermal data, and symbolization are available at For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at DBV/DCK/DRL/DRY: The actual top-side marking has one additional character that designates the assembly/test site. YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, = Pb-free).

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over operating free-air temperature range (unless otherwise noted)

Control input voltage range (2) Switch I/O voltage range (2) Control input clamp current I/O port diode current On-state switch current (6)

Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltages are with respect to ground unless otherwise specified. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. This value is limited 5.5 V maximum. VI, VO, VA, and VBn are used to denote specific conditions for VI/O. II, IO, IA, and IBn are used to denote specific conditions for II/O. The package thermal impedance is calculated in accordance with JESD 51-7.


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