Details, datasheet, quote on part number: ADS8588HIPM
PartADS8588HIPM
CategorySemiconductors => Data Converters => Analog-to-Digital Converters (ADCs) => Precision ADCs (<=10MSPS)
Part familyADS8588H 16-Bit 500kSPS 8-Channel Simultaneous-Sampling ADC With Bipolar Inputs on a Single Supply
TitleAnalog to Digital Converters - ADC 16B MULTI CHANNEL 500KSPS SAR ADC
Description16-Bit 500kSPS 8-Channel Simultaneous-Sampling ADC With Bipolar Inputs on a Single Supply 64-LQFP -40 to 125
CompanyTexas Instruments Inc.
StatusACTIVE
ROHSY
SampleNo
DatasheetDownload ADS8588HIPM datasheet
Specifications 
Analog Voltage AVDD(Max)(V)5.25
InterfaceByte-Wide,Parallel,SPI
THD(Typ)(dB)-110
Package GroupLQFP
RatingCatalog
Resolution(Bits)16
FeaturesOscillator,Over-Voltage Protection,PGA
Operating Temperature Range(C)-40 to 125
Input Range(Min)(V)-10
Input TypeSingle-Ended
Sample Rate (max)(SPS)500 kSPS
# Input Channels8
Reference ModeExt,Int
Approx. Price (US$)15.00 | 1ku
Power Consumption(Typ)(mW)88.5
Analog Voltage AVDD(Min)(V)4.75
Input Range(Max)(V)10
SNR(dB)92.6
ArchitectureSAR
  Mecanical Data
Pin nbPackage typeInd stdJEDEC codePackage qtyCarrierDevice markWidth (mm)Length (mm)Thick (mm)Pitch (mm)
64PMLQFPS-PQFP-G160JEDEC TRAY (5+1)ADS8588H 10101.4.5
Evaluation Kits
ADS8588SEVM-PDK: ADS8588S Evaluation Module Performance Demonstration Kit (PDK)

Others parts numbering
ADS8588SEVM-PDK: Data Conversion IC Development Tools ADS8588SEVM-PDK
ADS8598HIPM: Analog to Digital Converters - ADC 18B MULTI CHANNEL 500KSPS SAR ADC
ADS8598HIPMR: Texas Instruments 18B 8CH 500KSPS SAR ADC
ADS8588HIPMR: Texas Instruments 16B 8CH 500KSPS SAR ADC

 

Features, Applications

500-kSPS, 8-Channel, Simultaneous-Sampling ADC With Bipolar Inputs on a Single Supply

The ADS8588H device an 8-channel, integrated data acquisition (DAQ) system based a 16-bit successive approximation (SAR) analog-to-digital converter (ADC). All input channels are simultaneously sampled to achieve a maximum throughput of 500 kSPS per channel. The device features a complete analog front-end for each channel, including a programmable gain amplifier (PGA) with a high input impedance M, an input clamp, low-pass filter, and an ADC input driver. The device also features a low-drift, precision reference with a buffer to drive the ADC. A flexible digital interface supporting serial, parallel, and parallel byte communication enables the device to be used with a variety of host controllers. The ADS8588H can be configured to accept or 5-V true bipolar inputs using a single 5-V supply. The high input impedance allows direct connection with sensors and transformers, thus eliminating the need for external driver circuits. The high performance and accuracy, along with zero-latency conversions offered by this device, also means the ADS8588H meets the strict design requirements for many industrial automation and control applications. Device Information(1)

PART NUMBER ADS8588H PACKAGE LQFP (64) BODY SIZE (NOM) 10.00 mm

16-Bit ADC With Integrated Analog Front-End Simultaneous Sampling: 8 Channels Pin-Programmable Bipolar Inputs: 10 V and 5 V High Input Impedance: M 5-V Analog Supply: to 5-V I/O Supply Overvoltage Input Clamp With 9-kV ESD Low-Drift, On-Chip Reference (2.5 V) and Buffer Performance: 500-kSPS Max Throughput on All Channels DNL: 0.3 LSB Typ; INL: 0.5 LSB Typ SNR: 92.7 dB Typ; THD: -110 dB Typ Over Temperature Performance: Max Offset Drift: 3 ppm/C Gain Drift: 6 ppm/C On-Chip Digital Filter for Oversampling Flexible Parallel, Byte, and Serial Interface Temperature Range: to +125C Package: LQFP-64

Monitoring and Control for Power Grids Protection Relays Multi-Phase Motor Controls Industrial Automation and Controls Multichannel Data Acquisition Systems

AVDD DVDD BUSY FRSTDATA STBY AIN_1P AIN_1GND Clamp PGA Clamp M: 3rd-Order LPF ADC Driver 16-Bit SAR ADC CONVSTA, CONVSTB RESET RANGE AIN_2P AIN_2GND Clamp PGA Clamp M: 3rd-Order LPF ADC Driver 16-Bit SAR ADC SAR Logic and Digital Control RD/SCLK PAR/SER SER/PAR Interface DB[15:0] DOUTA DOUTB ADS8588H

OS0 Digital Filter AIN_7P AIN_7GND Clamp 1 M: REFCAPB Clamp PGA 3rd-Order LPF ADC Driver 16-Bit SAR ADC OS1 OS2 REFCAPA

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.

Features.................................................................. Applications........................................................... Description............................................................. Revision History..................................................... Pin Configuration and Functions......................... Specifications.........................................................

Operation, CS and RD Separate............................. 6.18 Switching Characteristics: Serial Data Read Operation................................................................. 6.19 Switching Characteristics: Byte Mode Data Read Operation................................................................. 6.20 Typical Characteristics..........................................

Overview................................................................. Functional Block Diagram....................................... Feature Description................................................. Device Functional Modes........................................

Absolute Maximum Ratings...................................... 5 ESD Ratings.............................................................. 5 Recommended Operating Conditions....................... 6 Thermal Information.................................................. 6 Electrical Characteristics........................................... 7 Timing Requirements: CONVST Control................ 10 Timing Requirements: Data Read Operation.......... 10 Timing Requirements: Parallel Data Read Operation, CS and RD Tied Together....................................... 10 6.9 Timing Requirements: Parallel Data Read Operation, CS and RD Separate............................................... 11 6.10 Timing Requirements: Serial Data Read Operation................................................................. 11 6.11 Timing Requirements: Byte Mode Data Read Operation................................................................. 11 6.12 Timing Requirements: Oversampling Mode.......... 11 6.13 Timing Requirements: Exit Standby Mode............ 11 6.14 Timing Requirements: Exit Shutdown Mode......... 12 6.15 Switching Characteristics: CONVST Control........ 12 6.16 Switching Characteristics: Parallel Data Read Operation, CS and RD Tied Together..................... 12 6.17 Switching Characteristics: Parallel Data Read

Documentation Support........................................ Receiving Notification of Documentation Updates Community Resources.......................................... Trademarks........................................................... Electrostatic Discharge Caution............................ Glossary................................................................

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
DATE September 2017 REVISION * NOTES Initial release.
Submit Documentation Feedback Product Folder Links: ADS8588H
AVDD AGND OS1 OS2 PAR/SER/BYTE_SEL STBY RANGE CONVSTA CONVSTB RESET RD/SCLK CS BUSY FRSTDATA DB0

AVDD AGND REFGND REFCAPB REFCAPA REFGND REFIN/REFOUT AGND REGCAP2 AVDD REGCAP1 AGND REFSEL DB15/BYTE_SEL

PIN NAME AGND AIN_2P AIN_3GND NO. TYPE P AI DESCRIPTION Analog ground pins Analog input channel 1: negative input. Analog input channel 1: positive input. Analog input channel 2: negative input. Analog input channel 2: positive input. Analog input channel 3: negative input.


 

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