Details, datasheet, quote on part number: FIDO5100BBCZ
PartFIDO5100BBCZ
Category
TitleIC ETHERNET SWITCH BGA-144
Description
CompanyAnalog Devices
DatasheetDownload FIDO5100BBCZ datasheet
  
FIDO5100BBCZ photo

Others parts numbering
FIDO5200BBCZ

 

Features, Applications
FEATURES

144-lead CSP_BGA RoHS compliant package to +85C industrial temperature range rating 3.3 V input/output buffers IEEE 10 Mbps/100 Mbps, half and full duplex, IPv6 and IPv4 communication 2 independent Ethernet ports: 1 MII and 1 RMII interface per port Support for all industrial protocols PROFINET Class B and Class C with fast startup (Version 2.3) EtherNet/IP with QuickConnect, CIP Sync, and CIP Motion Modbus TCP EtherCAT SERCOS III Ethernet POWERLINK Host interface transfer rate: 32 bits per 28 ns Supports EtherCAT cycle times down 12.5 s and PROFINET cycle times down s PI Net Load Class III capable DLR (supervisor and node, announce and beacon based), MRPD, HSR, PRP, shared device, controller redundancy IEEE 1588 Version 2 support: ordinary clock; both peer to peer and end to end transparent clocks, raw frames, and UDP 8 independent timer signals synchronized with an internal precision timer 4 independently programmable timer signals for timer capture events or timer output events 4 timer signals create programmable periodic waveforms synchronized to the internal precision timer DCP, LLDP, DHCP, RSTP, VLAN, IGMP snooping support Forwarding table with aging and learning Drive LEDs for link activity

TIMER CONTROL UNIT HOST INTERFACE BUFFER MEMORY

The fido5100 and fido5200 are programmable IEEE 10 Mbps/100 Mbps Ethernet Internet Protocol Version 6 (IPv6) and Internet Protocol Version 4 (IPv4) switches that support virtually any Layer 2 or Layer 3 protocol. The switches are personalized to support the desired protocol by firmware that is downloaded from a host processor. The firmware is contained in the real-time Ethernet multiprotocol (REM) switch driver, and is downloaded at power-up. The REM switch can be ready for network data operation in less than ms to support fast startup and quick connect type network functionality. The fido5100/fido5200 devices have the same signal assignments as defined in this data sheet. The fido5100 supports the following protocols: PROFINET real time (RT) and isochronous real time (IRT), EtherNet/IP with and without device level ring (DLR), Modbus TCP, SERCOS III, and POWERLINK. The fido5200 supports the following protocols: EtherCAT and all protocols defined for the fido5100. The REM switch is intended for use with a host processor. Network operation is handled using the functions and services provided in the REM switch driver. The host processor can implement any protocol stack by integrating it with the REM switch driver. An example application is shown in Figure 11. The fido5100 and fido5200 REM switches are available a 144-ball chip scale package ball grid array (CSP_BGA) package. Note that throughout this data sheet, multifunction pins, such as A02/ALE, are referred to either by the entire pin name by a single function of the pin, for example, ALE, when only that function is relevant.

APPLICATIONS
Industrial automation Process control Managed Ethernet switch

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

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Features.............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram.............................................................. 1 General Description......................................................................... 1 Specifications..................................................................................... 3 REM Switch Characteristics........................................................ 3 Timing Specifications--NonMultiplexed Address Data Bus. 3 Timing Specifications--Multiplexed Address Data Bus......... 5 Absolute Maximum Ratings............................................................ 7 ESD Caution.................................................................................. 7 Pin Configuration and Function Descriptions............................. 8 Theory of Operation...................................................................... 12

Device Interfaces........................................................................ 12 Internal Precision Timer........................................................... 12 Host Interface.............................................................................. 12 Ethernet Interface....................................................................... 15 Applications Information.............................................................. 17 REM Switch Hardware.............................................................. 17 Board Layout............................................................................... 17 Design Considerations.............................................................. 17 Outline Dimensions....................................................................... 19 Ordering Guide.......................................................................... 19

Parameter OPERATING CONDITIONS Core Voltage Input/Output (I/O) Buffers PLL Analog Voltage Regulator Power Supply DC Input Voltage Output Voltage Operating Junction Temperature (Industrial) DC CHARACTERISTICS (I/O STANDARD) 3.3 V LVCMOS VCC+3V3 Input Voltage Low (VIL) High (VIH) Output Voltage Low (VOL) High (VOH) Output Current Low (IOL) High (IOH) LEAKAGE CURRENT Input Pin Tristated I/O Pin HOST INTERFACE TRANSFER RATE1

Input voltage (VIN) 3.3 V maximum Output voltage (VOUT) 3.3 V maximum Per 28 ns
Supports EtherCAT cycle times down 12.5 s and PROFINET cycle times down 31.25 s.
Table 2. Nonmultiplexed Address Data Bus--Read and Write Cycle Timing1
Parameter tAS tAH tCDV tODV tOEL tCSH tCSL tEOE tCOE tDO tDHZ tCHZ tWES tWEWC tWECS tDS tDH

Description Address setup time Address hold time CS to data valid time Output enable to data valid time Output enable low time CS high time CS low time CS to output enable time Output enable high to CS high Output enable to data drive time Output disable to high-Z time CS high to high-Z time CS to write enable Write enable to write complete Write enable high to CS high Data setup to WE high Input data hold after WE high

The MBS pin determines whether the host interfaced has multiplexed or separate address and data lines. When MBS = 0, the interface is nonmultiplexed. Rev. 0 | Page of 19


 

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