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Details, datasheet, quote on part number:2416
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Datasheet text preview:
AT24C01A/02/04/08/16
Features
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Low Voltage and Standard Voltage Operation 5.0 (VCC = 4.5V to 5.5V) 2.7 (VCC = 2.7V to 5.5V) 2.5 (VCC = 2.5V to 5.5V) 1.8 (VCC = 1.8V to 5.5V) Internally Organized 128 x 8 (1K), 256 x 8 (2K), 512 x 8 (4K), 1024 x 8 (8K) or 2048 x 8 (16K) 2-Wire Serial Interface Bidirectional Data Transfer Protocol 100 kHz (1.8V, 2.5V, 2.7V) and 400 kHz (5V) Compatibility Write Protect Pin for Hardware Data Protection 8-Byte Page (1K, 2K), 16-Byte Page (4K, 8K, 16K) Write Modes Partial Page Writes Are Allowed Self-Timed Write Cycle (10 ms max) High Reliability Endurance: 1 Million Cycles Data Retention: 100 Years Automotive Grade and Extended Temperature Devices Available 8-Pin and 14-Pin JEDEC SOIC and 8-Pin PDIP Packages
2-Wire Serial CMOS E2PROM
1K (128 x 8) 2K (256 x 8) 4K (512 x 8)
Description
The AT24C01A/02/04/08/16 provides 1024/2048/4096/8192/16384 bits of serial electrically erasable and programmable read only memory (EEPROM) organized as 128/256/512/1024/2048 words of 8 bits each. The device is optimized for use in many industrial and commercial applications where low power and low voltage operation are essential. The AT24C01A/02/04/08/16 is available in space saving 8-pin PDIP, 8-pin and 14-pin SOIC packages and is accessed via a 2-wire serial interface. In addition, the entire family is available in 5.0V (4.5V to 5.5V), 2.7V (2.7V to 5.5V), 2.5V (2.5V to 5.5V) and 1.8V (1.8V to 5.5V) versions.
8K (1024 x 8) 16K (2048 x 8)
AT24C01A/2/4/8/16
Pin Configurations
Pin Name A0 to A2 SDA SCL WP NC Function Address Inputs Serial Data Serial Clock Input Write Protect No Connect
8-Pin PDIP
14-Pin SOIC 8-Pin SOIC
0180C
2-25
Absolute Maximum Ratings*
Operating Temperature.......... -55°C to +125°C Storage Temperature.... -65°C to +150°C Voltage on Any Pin with Respect to Ground ............ -0.1V to +7.0V Maximum Operating Voltage ... 6.25V DC Output Current ........ 5.0 mA
*NOTICE: Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Block Diagram
Pin Description
SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each E2PROM device and negative edge clock data out of each device. SERIAL DATA (SDA): The SDA pin is bidirectional for serial data transfer. This pin is open-drain driven and may be wire-ORed with any number of other open-drain or open collector devices. DEVICE/PAGE ADDRESSES (A2, A1, A0): The A2, A1 and A0 pins are device address inputs that are hard wired for the AT24C01A and the AT24C02. As many as eight 1K/2K devices may be addressed on a single bus system (device addressing is discussed in detail under the Device Addressing section). 2-26 The AT24C04 uses the A2 and A1 inputs for hard wire addressing and a total of four 4K devices may be addressed on a single bus system. The A0 pin is a no connect. The AT24C08 only uses the A2 input for hardwire addressing and a total of two 8K devices may be addressed on a single bus system. The A0 and A1 pins are no connects. The AT24C16 does not use the device address pins which limits the number of devices on a single bus to one. The A0, A1 and A2 pins are no connects. (continued)
AT24C01A/02/04/08/16
AT24C01A/02/04/08/16
Pin Description (Continued)
WRITE PROTECT (WP): The AT24C01A/02/04/16 has a Write Protect pin that provides hardware data protection. The Write Protect pin allows normal read/write operations when connected to ground (GND). When the Write Protect pin is connected to VCC, the write protection feature is enabled and operates as shown in the following table.
WP Pin Status 24C01A
At VCC At GND
Memory Organization
AT24C01A, 1K SERIAL E2PROM: Internally organized with 128 pages of 1-byte each, the 1K requires a 7 bit data word address for random word addressing. A T 2 4 C 0 2 , 2K SERIAL E2PROM: Internally organized with 256 pages of 1-byte each, the 2K requires an 8 bit data word address for random word addressing. AT24C04, 4K SERIAL E2PROM: The 4K is internally organized with 256 pages of 2-bytes each. Random word addressing requires a 9 bit data word address. AT24C08, 8K SERIAL E2PROM: The 8K is internally organized with 4 blocks of 256 pages of 4-bytes each. Random word addressing requires a 10 bit data word address. AT24C16, 16K SERIAL E2PROM: The 16K is internally organized with 8 blocks of 256 pages of 8-bytes each. Random word addressing requires an 11 bit data word address.
Part of the Array Protected 24C02 24C04 24C08 24C16
Upper Normal Full (1K) Full (2K) Full (4K) Read/Write Half (8K) Array Array Array Array Operation Normal Read/Write Operations
Pin Capacitance (1)
Symbol CI/O CIN
Note:
Applicable over recommended operating range from TA = 25°C, f = 1.0 MHz, VCC = +1.8V. Test Condition Input/Output Capacitance (SDA) Input Capacitance (A0, A1, A2, SCL)
1. This parameter is characterized and is not 100% tested.
Max 8 6
Units pF pF
Conditions VI/O = 0V VIN = 0V
DC Characteristics
Applicable over recommended operating range from: TAI = -40°C to +85°C, VCC = +1.8V to +5.5V, TAC = 0°C to +70°C, VCC = +1.8V to +5.5V (unless otherwise noted). Symbol VCC1 VCC2 VCC3 VCC4 ICC ICC ISB1 ISB2 ISB3 ISB4 ILI ILO VIL VIH VOL2 VOL1
Note:
Parameter Supply Voltage Supply Voltage Supply Voltage Supply Voltage Supply Current VCC = 5.0V Supply Current VCC = 5.0V Standby Current VCC = 1.8V Standby Current VCC = 2.5V Standby Current VCC = 2.7V Standby Current VCC = 5.0V Input Leakage Current Output Leakage Current Input Low Input High Level (1) Level (1)
Test Condition
Min 1.8 2.5 2.7 4.5
Typ
Max 5.5 5.5 5.5 5.5
Units V V V V mA mA µA µA µA µA µA µA V V V V
READ at 100 kHz WRITE at 100 kHz VIN = VCC or VSS VIN = VCC or VSS VIN = VCC or VSS VIN = VCC or VSS VIN = VCC or VSS VOUT = VCC or VSS -1.0 VCC x 0.7 IOL = 2.1 mA IOL = 0.15 mA
0.4 2.0 0.6 1.4 1.6 8.0 0.10 0.05
1.0 3.0 3.0 4.0 4.0 18.0 3.0 3.0 VCC x 0.3 VCC + 0.5 0.4 0.2
Output Low Level VCC = 3.0V Output Low Level VCC = 1.8V
1. VIL min and VIH max are reference only and are not tested.
2-27
AC Characteristics
Applicable over recommended operating range from TA = -40°C to +85°C, VCC = +1.8V to +5.5V, CL = 1 TTL Gate and 100 pF (unless otherwise noted). Symbol Parameter 2.7-, 2.5-, 1.8-volt Min fSCL tLOW tHIGH tI tAA tBUF tHD.STA tSU.STA tHD.DAT tSU.DAT tR tF tSU.STO tDH tWR
Note:
5.0-volt Min 1.2 0.6 Max 400 Units kHz µs µs 50 0.1 1.2 0.6 0.6 0 100 0.9 ns µs µs µs µs µs ns 0.3 300 0.6 50 µs ns µs ns 10 ms
Max 100
Clock Frequency, SCL Clock Pulse Width Low Clock Pulse Width High Noise Suppression Time
(1)
4.7 4.0 100 0.1 4.7 4.0 4.7 0 200 1.0 300 4.7 100 10 4.5
Clock Low to Data Out Valid Time the bus must be free before a new transmission can start (1) Start Hold Time Start Set-up Time Data In Hold Time Data In Set-up Time Inputs Rise Time
(1)
Inputs Fall Time (1) Stop Set-up Time Data Out Hold Time Write Cycle Time
1. This parameter is characterized and is not 100% tested.
Device Operation
CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an external device. Data on the SDA pin may change only during SCL low time periods (refer to Data Validity timing diagram). Data changes during SCL high periods will indicate a start or stop condition as defined below. START CONDITION: A high-to-low transition of SDA with SCL high is a start condition which must precede any other command (refer to Start and Stop Definition timing diagram). STOP CONDITION: A low-to-high transition of SDA with SCL high is a stop condition. After a read sequence, the stop command will place the E2PROM in a standby power mode (refer to Start and Stop Definition timing diagram). ACKNOWLEDGE: All addresses and data words are serially transmitted to and from the E2PROM in 8 bit words. The E2PROM sends a zero to acknowledge that it has received each word. This happens during the ninth clock cycle. STANDBY MODE: The AT24C01A/02/04/08/16 features a low power standby mode which is enabled: (a) upon power-up and (b) after the receipt of the STOP bit and the completion of any internal operations.
2-28
AT24C01A/02/04/08/16
AT24C01A/02/04/08/16
Bus Timing SCL: Serial Clock SDA: Serial Data I/O
Write Cycle Timing SCL: Serial Clock SDA: Serial Data I/O
Note:
1. The write cycle time tWR is the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle.
2-29
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