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Part: 271024
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Datasheet: Download 271024 datasheet File size : 1690 kB
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M27C1024
1 Megabit (64K x16) UV EPROM and OTP ROM
VERY FAST ACCESS TIME: 55ns COMPATIBLE with HIGH SPEED MICROPROCESSORS, ZERO WAIT STATE LOW POWER "CMOS" CONSUMPTION: Active Current 35mA Standby Current 100µA PROGRAMMING VOLTAGE: 12.75V ELECTRONIC SIGNATURE for AUTOMATED PROGRAMMING PROGRAMMING TIME of AROUND 6 sec. (PRESTO II ALGORITHM)
40
1
F DIP40W (F)
PLCC44 (C)
DESCRIPTION The M27C1024 is a 1 Megabit UV e rasable and el e ct rica lly p ro gr am ma bl e rea d on ly me mo ry (EPROM). I t is organized as 65,536 words by 16 bits. The 40 pin Ceramic Frit Seal Window package has a transparent lid which allows the user to expose the chip to ultraviolet light to erase the bit pattern. A new pattern can then be written to the device by following the programming procedure. For application where the content is programmed only one time and erasure is not required, the M27C1024 is offered in a Plastic Leaded Chip Carrier package. Table 1. Signal Names
A0 - A15 Q0 - Q15 E G P VPP VCC VSS March 1996 Address Inputs D ata Outputs
TSOP40 (N) 10 x 14mm
Figure 1. Logic Diagram
VCC
VPP
16 A0-A15
16 Q0-Q15
P E G
M27C1024
C hip Enable Output Enable Program Program Supply Supply Voltage Ground 1/13
VSS
AI00702B
M27C1024
Figure 2A. DIP Pin Connections
VPP E Q15 Q14 Q13 Q12 Q11 Q10 Q9 Q8 VSS Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 G 1 2 3 4 5 6 7 8 9 10 M27C1024 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 VCC P NC A15 A14 A13 A12 A11 A10 A9 VSS A8 A7 A6 A5 A4 A3 A2 A1 A0
Figure 2B. LCC Pin Connections
Q12 Q11 Q10 Q9 Q8 VSS NC Q7 Q6 Q5 Q4
Q13 Q14 Q15 E VPP NC VCC P NC A15 A14 1 44 A13 A12 A11 A10 A9 VSS NC A8 A7 A6 A5 12 M27C1024 34 23 Q3 Q2 Q1 Q0 G NC A0 A1 A2 A3 A4
AI00704
AI00703
Warning: NC = Not Connected.
Warning: NC = Not Connected.
Figure 2C. TSOP Pin Connections
A9 A10 A11 A12 A13 A14 A15 NC P VCC VPP E DQ15 DQ14 DQ13 DQ12 DQ11 DQ10 DQ9 DQ8 1 40 VSS A8 A7 A6 A5 A4 A3 A2 A1 A0 G DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 VSS
10 11
M27C1024 (Normal)
31 30
20
21
AI01582
Warning: NC = Not Connected. 2/13
DEVICE OPERATION The modes of operations of the M27C1024 are listed in the Operating Modes table. A single 5V power supply is required in the read mode. All inputs are T TL levels except for Vpp and 12V on A9 for Electronic Signature. Read Mode The M27C1024 has two control functions, both of which must b e logically active in order to obtain data at the outputs. Chip Enable (E) is the power control and should be used for device selection. Output Enable (G) is the output control and should be used to gate data to the output pins, independent of device selection. Assuming that the addresses are stable, the address access time (tAVQV) is equal to the delay from E to output (tELQV). Data is available at the output after a delay o f tOE from the falling edge of G, assuming that E has been low and the addresses have been stable for at least tAVQV-tGLQV. Standby Mode The M27C1024 has a standby mode which reduces the active current from 35mA to 100µA. The M27C1024 is placed in the standby mode by applying a TTL high signal to the E input. When in the standby mode, the outputs are in a high impedance state, independent of the G input.
M27C1024
Table 2. Absolute Maximum Ratings (1)
Symbol TA TBIAS TSTG VIO
(2)
Parameter Ambient Operating Temperature Temperature Under Bias Storage Temperature Input or Outp ut Voltages (except A9) Supply Voltage A9 Voltage Program Supply Voltage
Value 40 to 125 50 to 125 65 to 150 2 to 7 2 to 7 2 to 13.5 2 to 14
Unit °C °C °C V V V V
VCC VA9
(2)
VPP
Notes: 1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the SGS-THOMSON SURE Program and other relevant quality documents. 2. Minimum DC voltage on Input or Output is 0.5V with possible undershoot to 2.0V for a period less than 20ns. Maximum DC voltage on Output is VCC +0.5V with possible overshoot to VCC +2V for a period less than 20ns.
Table 3. Operating Modes
Mode Read Output Disable Program Verify Program Inhibit Standby Electronic Signature
Note: X = VIH or VI L, VID = 12V ±0.5V
E VIL VIL VIL VIL VIH VIH VIL
G VIL VIH X VIL X X VIL
P VIH X VIL Pulse VIH X X VIH
A9 X X X X X X VID
VPP VCC or VSS VCC or VSS VPP VPP VPP VCC or VSS VCC
Q0 - Q15 Data Output Hi-Z Data Input Data Output Hi-Z Hi-Z Codes
Table 4. Electronic Signature
Identifier Manufacturer's Code Device Code A0 VIL VIH Q7 0 1 Q6 0 0 Q5 1 0 Q4 0 0 Q3 0 1 Q2 0 1 Q1 0 0 Q0 0 0 Hex Data 20h 8Ch
Two Line Output Control Because EPROMs are usually used in larger memory arrays, this product features a 2 line control function which accommodates the use of multiple memory connection. The two line control function allows: a. the lowest possible memory power dissipation, b. complete assurance that output bus content ion will not occur.
For the most efficient use of these two control lines, E should be decoded and used as the primary device selecting function, while G should be made a common connection to all devices in the array and connected to the READ line from the system control bus. This ensures that all deselected memory devices are in their low power standby mode and that the output pins are only active when data is required from a particular memory device.
3/13
M27C1024
AC MEASUREMENT CONDITIONS
Input Rise and Fall Times Input Pulse Voltages Input and Output Timing Ref. Voltages 20ns 0.4V to 2.4 V 0.8V to 2.0 V
Figure 4. AC Testing Load Circuit
1.3V
1N914
Note that Output Hi-Z is defined as the point where data is no longer driven.
3.3k
Figure 3. AC Testing Input Output Waveforms
2.4V DEVICE UNDER TEST 2.0V 0.8V
AI00826
OUT CL = 100pF
0.4V
CL includes JIG capacitance
AI00828
Note: For 55ns class: i nput pulse voltages are 0V to 3V, input output test points are at 1.5V, CL is 30 pF.
Table 5. Capacitance (1) (TA = 25 °C, f = 1 MHz )
Symbol C IN COUT Parameter Input Capacitance Output Capacitance Test Co ndition VIN = 0V VOUT = 0V Min Max 6 12 Unit pF pF
Note: 1. Sampled only, not 100% tested.
Table 6. Read Mode DC Characteristics (1) (TA = 0 to 70 °C, 40 to 85 °C or 40 to 105 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC)
Symbol ILI ILO ICC ICC1 ICC2 IPP VIL VIH
(2)
Parameter Input Leakage Current Output Leakage Current Supply Current Supply Current (Standby) TTL Supply Current (Standby) CMOS Program Current Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage TTL Output High Voltage CM OS
Test C ondition 0V VIN VCC 0V VOUT VCC E = VIL, G = VIL, IOUT = 0mA, f = 5MHz E = VIH E > VCC 0.2V VPP = VCC
Min
Max ±10 ±10 35 1 100 100
Un it µA µA mA mA µA µA V V V V V
0.3 2 IOL = 2.1mA IOH = 400µA IOH = 100µA 2.4 VCC 0.7V
0.8 VCC + 1 0.4
VOL VOH
Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously with or after VPP. 2. Maximum DC voltage on Output is VCC +0.5V.
4/13
M27C1024
Table 7A. Read Mode AC Characteristics (1) (TA = 0 to 70 °C, 40 to 85 °C or 40 to 105 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC)
M27C1024 Symbol A lt Parameter Test C ondition -55
(3)
-70
-80
-90
Unit
M in Max Min Max Min Max Min Max tAVQV tELQV tGLQV tEHQZ
(2)
tACC tCE tOE tDF tDF tOH
Address Valid to Output Valid Chip Enable Low to Output Valid Output Enable Low to Output Valid Chip Enable High to Output Hi-Z Output Enable High to Output Hi-Z Address Transition to Output Transition
E = VIL, G = VIL G = VIL E = VIL G = VIL E = VIL E = VIL, G = VIL 0 0 0
55 55 30 30 30 0 0 0
70 70 35 30 30 0 0 0
80 80 40 30 30 0 0 0
90 90 45 30 30
ns ns ns ns ns ns
tGHQZ (2) tAXQX
Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously with or after VPP. 2. Sampled only, not 100% tested. 3. See specific AC Measurement Condition for -55 class.
Table 7B. Read Mode AC Characteristics (1) (TA = 0 to 70 °C, 40 to 85 °C or 40 to 105 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC)
M27C1024 Symbol Alt Parameter Test Condition -10 -12 -15 -20/-25 Unit
Min Max M in Max Min M ax Min Max tAVQV tELQV tGLQV tEHQZ (2) tGHQZ
(2)
tACC tCE tOE tDF tDF tOH
Address Valid to Output Valid Chip Enable Low to Output Valid Output Enable Low to Output Valid Chip Enable High to Output Hi-Z Output Enable High to Output Hi-Z Address Transition to Output Transition
E = VIL, G = VIL G = VIL E = VIL G = VIL E = VIL E = VIL, G = VIL 0 0 0
100 100 50 30 30 0 0 0
120 120 60 40 40 0 0 0
150 150 60 50 50 0 0 0
200 200 70 60 60
ns ns ns ns ns ns
tAXQX
Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously with or after VPP. 2. Sampled only, not 100% tested.
5/13
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