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Details, datasheet, quote on part number:64LC10-40
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Datasheet text preview:
CAT64LC10/20/40
1K/2K/4K-Bit Serial E2PROM FEATURES
s SPI Bus Compatible s Low Power CMOS Technology s 2.5V to 6.0V Operation s Self-Timed Write Cycle with Auto-Clear s Hardware Reset Pin s Hardware and Software Write Protection s Commercial and Industrial Temperature Ranges s Power-Up Inadvertant Write Protection s RDY/BUSY Pin for End-of-Write Indication s 1,000,000 Program/Erase Cycles s 100 Year Data Retention
DESCRIPTION
The CAT64LC10/20/40 is a 1K/2K/4K-bit Serial E2PROM which is configured as 64/128/256 registers by 16 bits. Each register can be written (or read) serially by using the DI (or DO) pin. The CAT64LC10/20/40 is manufactured using Catalyst's advanced CMOS E2PROM floating gate technology. It is designed to endure 1,000,000 program/erase cycles and has a data retention of 100 years. The device is available in 8-pin DIP or SOIC packages.
PIN CONFIGURATION
DIP Package (P)
CS SK DI DO 1 2 3 4 8 7 6 5 VCC RDY/BUSY RESET GND
SOIC Package (J)
RDY/BUSY VCC CS SK 1 2 3 4 8 7 6 5 RESET GND DO DI
SOIC Package (S)
CS SK DI DO 1 2 3 4 8 7 6 5 VCC RDY/BUSY RESET GND
5064 FHD F01
PIN FUNCTIONS
Pin Name CS SK DI DO VCC GND RESET RDY/BUSY Function Chip Select Clock Input Serial Data Input Serial Data Output +2.5V to +6.0V Power Supply Ground Reset Ready/BUSY Status
BLOCK DIAGRAM
VCC GND
MEMORY ARRAY 64/128/256 x 16
ADDRESS DECODER
DATA REGISTER DI RESET CS MODE DECODE LOGIC OUTPUT BUFFER
SK
CLOCK GENERATOR
DO
RDY/BUSY
64LC10/20/40 F02
© 1997 by Catalyst Semiconductor, Inc. Characteristics subject to change without notice
ABSOLUTE MAXIMUM RATINGS*
Temperature Under Bias ........ 55°C to +125°C Storage Temperature ..... 65°C to +150°C Voltage on any Pin with Respect to Ground(1) ... 2.0V to +VCC +2.0V VCC with Respect to Ground ...... 2.0V to +7.0V Package Power Dissipation Capability (Ta = 25°C) .. 1.0W Lead Soldering Temperature (10 secs) ... 300°C Output Short Circuit Current (2) ...... 100 mA RELIABILITY CHARACTERISTICS Symbol NEND(3) TDR(3) VZAP(3) ILTH(3)(4) Parameter Endurance Data Retention ESD Susceptibility Latch-Up Min. 1,000,000 100 2000 100 Max.
*COMMENT
Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability.
Units Cycles/Byte Years Volts mA
Reference Test Method MIL-STD-883, Test Method 1033 MIL-STD-883, Test Method 1008 MIL-STD-883, Test Method 3015 JEDEC Standard 17
CAPACITANCE (TA = 25°C, f= 1.0 MHz, VCC =6.0V) Symbol CI/O(3) CIN(3) Test Input/Output Capacitance (DO, RDY/BUSY) Input Capacitance (CS, SK, DI, RESET) Max. 8 6 Units pF pF Conditions VI/O = 0V VIN = 0V
Note: (1) The minimum DC input voltage is 0.5V. During transitions, inputs may undershoot to 2.0V for periods of less than 20 ns. Maximum DC voltage on output pins is VCC +0.5V, which may overshoot to VCC +2.0V for periods of less than 20 ns. (2) Output shorted for no more than one second. No more than one output shorted at a time. (3) This parameter is tested initially and after a design or process change that affects the parameter. (4) Latch-up protection is provided for stresses up to 100 mA on address and data pins from 1V to VCC +1V.
D.C. OPERATING CHARACTERISTICS VCC = +2.5V to +6.0V, unless otherwise specified. Limits Sym. I CC Parameter Operating Current 2.5V Min. Typ. Max. 0.4 1 2 3 0 2 10 0.1 VCC x 0.7 0.1 VCC x 0.8 2.5V 6.0V VCC 0.3 VCC 0.3 2.4 VOL(2) Low Level Output Voltage 2.5V 6.0V 0.4 0.4 V V VCC x 0.3 VCC + 0.5 VCC x 0.2 VCC + 0.5 Units mA mA mA mA µA µA µA V V V V V IOH = 10µA IOH = 10µA IOH = 400µA IOL = 10µA IOL = 2.1mA VIN = GND or VCC CS = VCC VIN = GND to VCC VOUT = GND to VCC Test Conditions fSK = 250 kHz fSK = 1 MHz
EWEN, EWDS, READ 6.0V I CCP ISB(1) I LI I LO VIL VIH VIL VIH Program Current 2.5V 6.0V Standby Current Input Leakage Current Output Leakage Current Low Level Input Voltage, DI High Level Input Voltage, DI Low Level Input Voltage, CS, SK, RESET High Level Input Voltage, CS, SK, RESET
VOH(2) High Level Output Voltage
Note: (1) Standby Current (ISB) = 0µA (<900nA) (2) VOH and VOL spec applies to READY/BUSY pin also
A.C. OPERATING CHARACTERISTICS VCC = +2.5V to +6.0V, unless otherwise specified. Limits Symbol tCSS t CSH t DIS tDIH t PD1 t PD0 tHZ(2) tCSMIN t SKHI Parameter CS Setup Time CS Hold Time DI Setup Time DI Hold Time Output Delay to 1 Output Delay to 0 Output Delay to High Impendance Minimum CS High Time Minimum SK High Time 2.5V 4.5V6.0V t SKLOW Minimum SK Low Time 2.5V 4.5V6.0V t SV f SK Output Delay to Status Valid Maximum Clock Frequency 2.5V 4.5V6.0V tRESS tRESMIN t RESH t RC Reset to CS Setup Time Minimum RESET High Time RESET to READY Hold Time Write Recovery 250 1000 0 250 0 100 ns ns ns ns 250 1000 400 1000 400 500 ns kHz ns Min. 100 100 200 200 300 300 500 Typ. Max. Units ns ns ns ns ns ns ns ns ns
POWER-UP TIMING(1)(3) Symbol tPUR t PUW Parameter Power-Up to Read Operation Power-Up to Program Operation Min. Max. 10 1 Units µs ms
WRITE CYCLE LIMIITS Symbol tWR Parameter Program Cycle Time 2.5V 4.5V6.0V Min. Max. 10 5 Units ms
Note: (1) This parameter is tested initially and after a design or process change that affects the parameter. (2) This parameter is sampled but not 100% tested. (3) tPUR and tPUW are the delays required from the time VCC is stable until the specified operation can be initiated.
INSTRUCTION SET Instruction Read 64LC10 64LC20 64LC40 Write 64LC10 64LC20 64LC40 Write Enable Write Disable [Write All Locations](1) Opcode 10101000 10101000 10101000 10100100 10100100 10100100 10100011 10100000 10100001 Address A5 A4 A3 A2 A1 A0 0 A6 A5 A4 A3 A2 A1 A0 0 0 Data D15 - D0 D15 - D0 D15 - D0 D15 - D0 D15 - D0 D15 - D0
A7 A6 A5 A4 A3 A2 A1 A0 A5 A4 A3 A2 A1 A0 0 A6 A5 A4 A3 A2 A1 A0 0 0
A7 A6 A5 A4 A3 A2 A1 A0 XXXXXXXX XXXXXXXX XXXXXXXX
D15D0
Figure 1. A.C. Testing Input/Output Waveform (2)(3(4) (CL = 100 pF)
VCC x 0.8 INPUT PULSE LEVELS VCC x 0.2 VCC x 0.3
5064 FHD F03
VCC x 0.7 REFERENCE POINTS
Note: (1) (Write All Locations) is a test mode operation and is therefore not included in the A.C./D.C. Operations specifications. (2) Input Rise and Fall Times (10% to 90%) < 10 ns. (3) Input Pulse Levels = VCC x 0.2 and VCC x 0.8. (4) Input and Output Timing Reference = VCC x 0.3 and VCC x 0.7.
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