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Part: 74AHCT14PWDH
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INTEGRATED CIRCUITS
DATA SHEET
74AHC14; 74AHCT14 Hex inverting Schmitt trigger
Product specification Supersedes data of 1999 Jan 11 File under Integrated Circuits, IC06 1999 Sep 27
Philips Semiconductors
Product specification
Hex inverting Schmitt trigger
FEATURES · ESD protection: HBM EIA/JESD22-A114-A exceeds 2 000 V MM EIA/JESD22-A115-A exceeds 200 V CDM EIA/JESD22-C101 exceeds 1 000 V · Balanced propagation delays · Inputs accepts voltages higher than VCC · For AHC only: operates with CMOS input levels · For AHCT only: operates with TTL input levels · Specified from -40 to +85 and +125 °C. DESCRIPTION The 74AHC/AHCT14 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC/AHCT14 provide six inverting buffers with Schmitt-trigger action. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. FUNCTION TABLE See note 1. INPUTS nA L H Note 1. H = HIGH voltage level; L = LOW voltage level. OUTPUTS nY H L QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf 3.0 ns.
74AHC14; 74AHCT14
TYPICAL SYMBOL tPHL/tPLH CI CO CPD PARAMETER propagation delay nA to nY input capacitance output capacitance power dissipation capacitance CL = 50 pF; f = 1 MHz; notes 1 and 2 CONDITIONS AHC CL = 15 pF; VCC = 5 V VI = VCC or GND 3.2 3.0 4.0 10 AHCT 4.0 3.0 4.0 12 ns pF pF pF UNIT
Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi + (CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; (CL × VCC2 × fo) = sum of outputs; CL = output load capacitance in pF; VCC = supply voltage in Volts. 2. The condition is VI = GND to VCC. PINNING PIN 1, 3, 5, 9, 11 and 13 2, 4, 6, 8, 10 and 12 7 14 SYMBOL 1A to 6A 1Y to 6Y GND VCC DESCRIPTION data inputs data outputs ground (0 V) DC supply voltage
1999 Sep 27
2
Philips Semiconductors
Product specification
Hex inverting Schmitt trigger
ORDERING INFORMATION OUTSIDE NORTH AMERICA 74AHC14D 74AHC14PW 74AHCT14D 74AHCT14PW
74AHC14; 74AHCT14
PACKAGES NORTH AMERICA PINS 74AHC14D 74AHC14PW DH 74AHCT14D 74AHCT14PW DH 14 14 14 14 PACKAGE SO TSSOP SO TSSOP MATERIAL plastic plastic plastic plastic CODE SOT108-1 SOT402-1 SOT108-1 SOT402-1
handbook, halfpage
1A 1Y 2A 2Y 3A 3Y GND
1 2 3 4 5 6 7
MNA203
14 VCC 13 6A 12 6Y
14
11 5A 10 5Y 9 4A
handbook, halfpage
A
Y
MNA205
8 4Y
Fig.1 Pin configuration.
Fig.2 Logic diagram (one Schmitt trigger).
handbook, halfpage
1
1A
1Y
2
3
2A
2Y
4
5
3A
3Y
6
9
4A
4Y
8
11
5A
5Y
10
13
6A
6Y
12
MNA204
Fig.3 Logic symbol.
1999 Sep 27
3
Philips Semiconductors
Product specification
Hex inverting Schmitt trigger
RECOMMENDED OPERATING CONDITIONS 74AHC SYMBOL VCC VI VO Tamb PARAMETER DC supply voltage input voltage output voltage operating ambient temperature range see DC and AC characteristics per device CONDITIONS MIN. 2.0 0 0 -40 -40
74AHC14; 74AHCT14
74AHCT UNIT TYP. MAX. 5.0 - - +25 +25 5.5 5.5 VCC +85 V V V °C
TYP. MAX. MIN. 5.0 - - +25 +25 5.5 5.5 VCC +85 4.5 0 0 -40
+125 -40
+125 °C
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134); voltages are referenced to GND (ground = 0 V). SYMBOL VCC VI IIK IOK IO ICC Tstg PD Notes 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. For SO packages: above 70 °C the value of PD derates linearly with 8 mW/K. For TSSOP packages: above 60 °C the value of PD derates linearly with 5.5 mW/K. PARAMETER DC supply voltage input voltage range DC input diode current DC output diode current DC VCC or GND current storage temperature range power dissipation per package for temperature range: -40 to +125 °C; note 2 VI VCC + 0.5 V; note 1 CONDITIONS MIN. MAX. UNIT -0.5 -0.5 - - - - -65 - +7.0 +7.0 -20 ±20 ±25 ±75 500 V V mA mA mA mA mW
DC output source or sink current -0.5 V < VO < VCC + 0.5 V
+150 °C
1999 Sep 27
4
Philips Semiconductors
Product specification
Hex inverting Schmitt trigger
DC CHARACTERISTICS
74AHC14; 74AHCT14
Type 74AHC14 Over recommended operating conditions; voltage are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER OTHER VT+ positive going threshold VCC (V) 3.0 4.5 5.5 VT- negative going threshold 3.0 4.5 5.5 VH hysteresis (VT+ - VT-) HIGH-level output VI = VIH or VIL; voltage; all outputs IO = -50 µA HIGH-level output voltage VI = VIH or VIL; IO = -4.0 mA VI = VIH or VIL; IO = -8.0 mA VOL LOW-level output VI = VIH or VIL; voltage; all outputs IO = 50 µA LOW-level output voltage VI = VIH or VIL; IO = 4 mA VI = VIH or VIL; IO = 8 mA II ICC CI input leakage current quiescent supply current input capacitance VI = VCC or GND VI = VCC or GND; IO = 0 3.0 4.5 5.5 VOH 2.0 3.0 4.5 3.0 4.5 2.0 3.0 4.5 3.0 4.5 5.5 5.5 - - - 0.9 1.35 1.65 0.3 0.4 0.5 1.9 2.9 4.4 2.58 3.94 - - - - - - - - - - - - - - - - - 2.0 3.0 4.5 - - 0 0 0 - - - - 3 25 Tamb (°C) -40 to +85 - - - 0.9 1.35 1.65 0.3 0.4 0.5 1.9 2.9 4.4 2.48 3.8 - - - - - - - - -40 to +125 UNIT - - - 0.9 1.35 1.65 0.25 0.35 0.45 1.9 2.9 4.4 2.40 3.70 - - - - - - - -
MIN. TYP. MAX. MIN. MAX. MIN. MAX. 2.2 3.15 3.85 - - - 1.2 1.4 1.6 - - - - - 0.1 0.1 0.1 0.36 0.36 0.1 2.0 10 2.2 3.15 3.85 - - - 1.2 1.4 1.6 - - - - - 0.1 0.1 0.1 0.44 0.44 1.0 20 10 2.2 3.15 3.85 - - - 1.2 1.4 1.6 - - - - - 0.1 0.1 0.1 0.55 0.55 2.0 40 10 µA µA pF V V V V V V V
1999 Sep 27
5
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