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Details, datasheet, quote on part number:74AHCT1G
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Datasheet text preview:
INTEGRATED CIRCUITS
DATA SHEET
74AHC1G00; 74AHCT1G00 2-input NAND gate
Product specification Supersedes data of 1998 Nov 25 File under Integrated Circuits, IC06 1999 Jan 27
Philips Semiconductors
Product specification
2-input NAND gate
FEATURES · Symmetrical output impedance · High noise immunity · ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V · Low power dissipation · Balanced propagation delays · Very small 5-pin package · Output capability: standard. DESCRIPTION The 74AHC1G/AHCT1G00 is a high-speed Si-gate CMOS device. The 74AHC1G/AHCT1G00 provides the 2-input NAND function. FUNCTION TABLE See note 1. INPUTS inA L L H H Note 1. H = HIGH voltage level. L = LOW voltage level. ORDERING AND PACKAGE INFORMATION inB L H L H OUTPUT outY H H H L Notes
74AHC1G00; 74AHCT1G00
QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf 3.0 ns. TYPICAL SYMBOL tPHL/tPLH CI CPD PARAMETER propagation delay inA, inB to outY input capacitance power dissipation capacitance CONDITIONS AHC1G CL = 15 pF VCC = 5 V 3.5 1.5 notes 1 and 2; 17 CL = 50 pF; f = 1 MHz AHCT1G 3.6 1.5 18 ns pF pF UNIT
1. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi + (CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V. 2. The condition is VI = GND to VCC. PINNING PIN 1 2 3 4 5 inB inA GND outY VCC SYMBOL data input data input ground (0 V) data output DC supply voltage DESCRIPTION
PACKAGES TYPE NUMBER 74AHC1G00GW 74AHCT1G00GW TEMPERATURE RANGE -40 to +85 °C PINS 5 5 PACKAGE SC-88A SC-88A MATERIAL plastic plastic CODE SOT353 SOT353 MARKING AA CA
1999 Jan 27
2
Philips Semiconductors
Product specification
2-input NAND gate
74AHC1G00; 74AHCT1G00
handbook, halfpage
inB 1 inA 2 GND 3
MNA096
5 VCC
handbook, halfpage
1 2
inB inA
outY
4
00
4 outY
MNA097
Fig.1 Pin configuration.
Fig.2 Logic symbol.
handbook, halfpage
1 2
handbook, halfpage
inB outY
&
4
MNA098
inA
MNA099
Fig.3 IEC logic symbol.
Fig.4 Logic diagram.
1999 Jan 27
3
Philips Semiconductors
Product specification
2-input NAND gate
RECOMMENDED OPERATING CONDITIONS
74AHC1G00; 74AHCT1G00
74AHC1G SYMBOL VCC VI VO Tamb PARAMETER DC supply voltage input voltage output voltage operating ambient temperature range input rise and fall times except for Schmitt-trigger inputs see DC and AC characteristics per device VCC = 3.3 V ±0.3 V VCC = 5 V ±0.5 V CONDITIONS MIN. 2.0 0 0 -40 TYP. 5.0 - - +25 MAX. 5.5 5.5 VCC +85 MIN. 4.5 0 0 -40
74AHCT1G UNIT TYP. 5.0 - - +25 MAX. 5.5 5.5 VCC +85 V V V °C
tr,tf (t/f)
- -
- -
100 20
- -
- -
- 20
ns/V
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134); voltages are referenced to GND (ground = 0 V). SYMBOL VCC VI IIK IOK IO ICC Tstg PD Notes 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. Above +55 °C the value of PD derates linearly with 2.5 mW/K. PARAMETER DC supply voltage input voltage range DC input diode current DC output diode current DC output source or sink current DC VCC or GND current storage temperature range power dissipation per package temperature range: -40 to +85 °C; note 2 VI VCC + 0.5 V; note 1 -0.5 V < VO < VCC + 0.5 V CONDITIONS MIN. -0.5 -0.5 - - - - -65 - MAX. +7.0 +7.0 -20 ±20 ±25 ±75 +150 200 UNIT V V mA mA mA mA °C mW
1999 Jan 27
4
Philips Semiconductors
Product specification
2-input NAND gate
DC CHARACTERISTICS
74AHC1G00; 74AHCT1G00
Family 74AHC1G Over recommended operating conditions; voltage are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER OTHER VIH HIGH-level input voltage VCC (V) 2.0 3.0 5.5 VIL LOW-level input voltage 2.0 3.0 5.5 VOH HIGH-level output voltage; all outputs VI = VIH or VIL; IO = -50 µA VI = VIH or VIL; IO = -4.0 mA VI = VIH or VIL; IO = -8.0 mA VOL LOW-level output voltage; all outputs VI = VIH or VIL; IO = 50 µA VI = VIH or VIL; IO = 4 mA VI = VIH or VIL; IO = 8 mA II ICC CI input leakage current quiescent supply current input capacitance VI = VCC or GND 2.0 3.0 4.5 VOH HIGH-level output voltage 3.0 4.5 2.0 3.0 4.5 VOL LOW-level output voltage 3.0 4.5 5.5 MIN. 1.5 2.1 3.85 - - - 1.9 2.9 4.4 2.58 3.94 - - - - - - - - - - - - - - 2.0 3.0 4.5 - - 0 0 0 - - - - 1.5 +25 TYP. MAX. - - - 0.5 0.9 1.65 - - - - - 0.1 0.1 0.1 0.36 0.36 0.1 1.0 10 Tamb (°C) -40 to +85 MIN. 1.5 2.1 3.85 - - - 1.9 2.9 4.4 2.48 3.8 - - - - - - - - MAX. - - - 0.5 0.9 1.65 - - - - - 0.1 0.1 0.1 0.44 0.44 1.0 10 10 µA µA pF V V V V V V UNIT
VI = VCC or GND; 5.5 IO = 0
1999 Jan 27
5
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