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Part: 74LVQ244T
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Datasheet: Download 74LVQ244T datasheet File size : 143 kB
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74LVQ244
LOW VOLTAGE OCTAL BUS BUFFER WITH 3 STATE OUTPUTS (NON-INVERTED)
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HIGH SPEED: tPD = 6 ns (TYP.) at VCC = 3.3V INPUT & OUTPUT TTL COMPATIBLE LEVELS LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA = 25 oC LOW NOISE: VOLP = 0.4V (TYP.) at VCC = 3.3V 75 TRANSMISSION LINE OUTPUT DRIVE CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 12 mA (MIN) PCI BUS LEVELS GUARANTEED AT 24mA BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 3.6V (1.2V Data Retention) PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 244 IMPROVED LATCH-UP IMMUNITY
M (Micro Package)
T (TSSOP Package)
ORDER CODES : 74LVQ24 4M 74LVQ244 T technology. It is ideal for low power and low noise 3.3V applications. It has better speed performance at 3 .3V than 5V LSTTL family combined with the true CMOS low power consumption. G control output governs four BUS BUFFERs. This device is designed to be used with 3 state memory address drivers, e tc. All inputs and outputs are equipped with protection circuits against s tatic discharge, giving them 2KV ESD immunity and transient excess voltage.
DESCRIPTION The LVQ244 is a low voltage CMOS OCTAL BUS BUFFER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS
PIN CONNECTION AND IEC LOGIC SYMBOLS
February 1997
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74LVQ244
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
P IN No 1 2, 4, 6, 8 9, 7, 5, 3 11, 13, 15, 17 18, 16, 14, 12 19 10 20 S YMB O L 1G 1A1 to 1A4 2Y1 to 2Y4 2A1 to 2A4 1Y1 to 1Y4 2G GND VCC N AM E A ND F UNC T I O N Out put En able In put Dat a In puts Dat a Ou t puts Dat a In puts Dat a Ou t puts Out put En abel In put Grou nd (0V) Pos it ive Su pply Vo lt age
TRUTH TABLE
I N PU T G L L H
X: "H" or "L" Z: High impedance
O U T PU T An L H X Yn L H Z
ABSOLUTE MAXIMUM RATING
S y mb o l VCC VI VO IIK IOK IO ICC or IGND Tstg TL Supply Vo lt age DC In put Volta ge DC Ou tpu t Vo lt age DC In put Diode Curr ent DC Ou tpu t D iode C u rrent DC Ou tpu t C urrent DC VCC or Gro und Current Stor age T emperat ur e Lead T empe ratu re (10 se c) P arame t er V al u e -0.5 to +7 -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 ± 20 ± 20 ± 50 ± 400 -65 to +150 300 Un i t V V V mA mA mA mA
o o
C C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied.
RECOMMENDED OPERATING CONDITIONS
S y mb o l VCC VI VO Top dt/dv Inp ut Volta ge Out put V oltage Ope rat ing T empe ratu re : Inp ut Rise a nd Fa ll T im e ( VCC = 3V) ( note 2) P arame t er Supply Vo lt age ( note 1) Va lu e 2 to 3.6 0 to VCC 0 to VCC -40 to +85 0 to 10 Un i t V V V
o
C
ns/V
1) Truth Table guaranteed: 1.2V to 3.6V
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74LVQ244
DC SPECIFICATIONS
S ym b o l P ar am e te r V CC (V) VIH VIL VOH High Level I nput V o ltage Low L evel Input Volta ge High Level O ut put Volt age Low L evel Outp ut Volt age Input Leakage C urrent 3 St a te O utp ut L e akage Current Quies cent Supply Current Dynam ic Out put Current (not e 1 , 2) 3.0 to 3.6 3.0 VI = VIH or VIL VI = VIH or VIL
(*) (*)
T e st Co n d i t i o n s
o
Va lu e T A = 25 C Mi n. 2.0 0.8 Typ. M a x. - 40 t o 85 C Min . 2.0 0.8 2.9 2.48 2.2 0.002 0 0.1 0.36 ±0.1 ±0.5 4 36 -25 0.1 0.44 0.55 ±1 ±5 40 2.99 M ax.
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Unit
V V V
IO=-50 µA IO=-12 mA IO=-24 mA IO=50 µA IO=12 mA IO=24 mA
2.9 2.58
VOL
3.0
V µA µA µA mA mA
II IOZ ICC IOLD IOHD
3.6 3.6 3.6 3.6
VI = VCC or GND VI = VIH or VIL VO = VCC or GND VI = VCC or GND VOLD = 0.8 V max VOHD = 2 V min
1) Maximum test duration 2ms, one output loaded at time 2) Incident wave switching is guaranteed on transmission lines with impedances as low as 50 .
DYNAMIC SWITCHING CHARACTERISTICS
S ym b o l P ar am e te r V CC (V) VOLP VOLV VIHD VILD Dynam ic Low V oltag e Quiet O utput ( note 1, 2) Dynam ic High Vo lt age Input (note 1 , 3) Dynam ic Low V oltag e Input (note 1 , 3) 3.3 -0.8 3.3 3.3 CL = 50 pF 0.8 T e st Co n d i t i o n s Mi n. Typ. 0.4 -0.5 2 V Va lu e T A = 2 5 oC M a x. 0.8 - 40 t o 85 o C Min . M ax. Unit
1) Worst case package 2) Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V, (n -1) outputs switching and one output at GND 3) max number of data inputs (n) switching. (n-1) switching 0V to 3.3V. Inputs under test switching: 3.3V to threshold (VILD), 0V to threshold (VIHD). f=1MHz
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74LVQ244
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, RL = 500 , Input tr = t f =3 ns)
S ym b o l P a r a m e te r V CC (V) tPLH tPHL tPZL tPZH tPLZ tPHZ tOSLZ tOSHL Propagati on D e lay T ime Out put En able Ti m e Out put D isable T im e Out put to Ou tp ut Sk ew Tim e (n ote 1 , 2) 2.7 3.3
(*)
T est C o n d i t i o n
o
Va lue - 40 t o 85 C T A = 25 C M i n . T y p . M a x. M i n . M ax. 7 13 14 6 8.5 7 9 7.5 0.5 0.5 9 17 12 19 13.5 1.5 1.5 9.5 18 12.5 20 14 1.5 1.5
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Unit
ns ns ns ns
2.7 3.3(*) 2.7 3.3(*) 2.7 3.3
(*)
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switching in the same direction, either HIGH or LOW 2) Parameter guaranteed by design (*) Voltage range is 3.3V ± 0.3V
CAPACITIVE CHARACTERISTICS
S ym b o l P ar am e te r V CC (V) CIN COUT CPD Input Capacita nce Out put C apacit ance Power D is sipat ion Capacit ance (n ote 1) 3.3 3.3 3.3 fIN = 10 MHz T e st Co n d i t i o n s Mi n. Typ. 5 10 15 Va lu e T A = 2 5 oC M a x. - 40 t o 85 o C Min . M ax. pF pF pF Unit
1) CPD is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operting current can be obtained by the following equation. ICC(opr) = CPD · VCC · fIN + ICC/n (per circuit)
TEST CIRCUIT
T E ST t PLH, tPHL t PZL, tPL Z t PZH, tPHZ
CL = 50 pF or equivalent (includes jig and probe capacitance) RL = R1 = 500 or equivalent RT = ZOUT of pulse generator (typically 50)
SW I T C H Open 2VCC GND
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74LVQ244
WAVEFORM 1: PROPAGATION DELAYS (f=1MHz; 50% duty cicle)
WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIME (f =1MHz; 50% duty cicle)
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