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Part: 74V1T08S
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74V1T08
SINGLE 2-INPUT AND GATE
PRELIMINARY DATA
s s
s
s
s
s
s
s
HIGH SPEED: tPD = 4.7 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 1 µA (MAX.) at TA = 25 oC COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUTS & OUTPUT SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 4.5V to 5.5V IMPROVED LATCH-UP IMMUNITY
S (SOT23-5L) ORDER CODE: 74V1T08S The internal circuit is composed of 2 stages including buffer o utput, which provide high noise immunity and stable output . Power down protection is provided on all inputs and output and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. All inputs and output are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
DESCRIPTION The 74V1T08 is an advanced high-speed CMOS SINGLE 2-INPUT AND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technolog y. I t has similar high speed performance of equivalent Bipolar Schottky TTL combined with tru e CMOS low power dissipation.
PIN CONNECTION AND IEC LOGIC SYMBOLS
March 1998
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74V1T08
INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
P I N No 1 2 4 3 5 S YMB O L 1A 1B 1Y GND VCC NAM E AN D F UNC T I O N D at a Inp ut D at a Inp ut D at a Out put G ro und (0 V) P os itiv e S upply V olt age
TRUTH TABLE
A L L H H B L H L H Y L L L H
ABSOLUTE MAXIMUM RATINGS
S y mb o l VCC VI VO VO II K IOK IO Tstg TL Supply Vo lt age DC In put Volta ge DC Ou tpu t Vo lt age ( se e not e 1) DC Ou tpu t Vo lt age ( se e not e 2) DC In put Diode Curr ent DC Ou tpu t D iode C u rrent DC Ou tpu t C urrent Stor age T emperat ur e Lead T empe ratu re (10 se c) P arame t er V al u e -0.5 to + 7.0 -0.5 to + 7.0 -0.5 to + 7.0 -0.5 t o VCC + 0.5 - 20 ± 20 ± 25 ± 50 -65 to +150 260 Un i t V V V V mA mA mA mA
o o
ICC or IGND DC VCC or Gro und Current
C C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied. 1) VCC = 0V 2) High or Low State
RECOMMENDED OPERATING CONDITIONS
S y mb o l VCC VI VO VO Top dt/dv Supply Vo lt age Inp ut Volta ge Out put V oltage (se e n ote 1 ) Out put V oltage (se e n ote 2 ) Ope rat ing T empe ratu re Inp ut Rise a nd Fa ll T im e ( s ee not e 3) ( VCC = 5.0 ± 0.5V ) P arame t er Va lu e 4.5 to 5.5 0 to 5.5 0 to 5.5 0 to VCC -40 to +85 0 to 20 Un i t V V V V
o
C
ns/V
1) VCC = 0V 2) High or Low State 3)VIN from 0.8V to 2 V
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74V1T08
DC SPECIFICATIONS
S ym b o l P ar amet e r T est Co n d i t i o n s V CC ( V) VIH VIL VOH VOL High Level I nput Volt age Low L evel Input Volt age High Level O ut put Volt age Low L evel Outp ut Volt age Input Leakage C urrent Quies cent Supply Current Additi onal Wo rst C a se Supply Curr ent Out put Leakage Current 4.5 to 5.5 4.5 to 5.5 4.5 4.5 4.5 4.5 0 to 5.5 5.5 5.5 VI = VI H VI = V I H or VIL IO=-50 µA IO=-8 mA IO=50 µA IO=8 mA 4.4 3.94 0.0 0.1 0.36 ±0.1 1 1.35 4.5 M in. 2 0.8 4.4 3.8 0.1 0.44 ± 1.0 10 1.5 V µA µA mA T yp . V al u e T A = 2 5 oC M ax. - 40 t o 85 o C Mi n. 2 0.8 M ax. V V Unit
V
II ICC ICC
VI = 5.5V or GN D VI = VCC or GND One Input at 3.4V, other input at VCC or GND VOUT = 5.5V 0
IOPD
0
0.5
5.0
µA
AC ELECTRICAL CHARACTERISTICS (Input tr = tf =3 ns)
S ym b o l P ar amet e r T e st Co n d i t i o n V CC ( *) ( V) 5.0 5.0 C L = 15 pF C L = 50 pF V al u e TA = 25 C M i n . T yp . M ax.
o
Unit - 40 t o 85 C M i n . M ax. 1.0 1.0 7.5 8.5 ns
o
tPLH tPHL
Propagati on D e lay Tim e
4.7 5.5
6.7 7.7
(*) Voltage range is 5V ± 0.5V
CAPACITIVE CHARACTERISTICS
S ym b o l P ar amet e r T est Co n d i t i o n s
o
V al u e TA = 25 C M in. T yp . 4 14 M ax. 10 - 40 t o 85 C Mi n. M ax. 10
o
Unit
CIN C PD
Input Capacita nce Power D is sipat ion Capacit ance (n ote 1)
pF pF
1) CPD is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD · VCC · fIN + ICC
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74V1T08
TEST CIRCUIT
CL = 15/50 pF or equivalent (includes jig and probe capacitance) RT = ZOUT of pulse generator (typically 50)
WAVEFORM: PROPAGATION DELAYS (f=1MHz; 50% duty cycle)
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74V1T08
SOT23-5L MECHANICAL DATA
mm MIN. A A1 A2 b C D E E1 L e e1 0.90 0.00 0.90 0.35 0.09 2.80 2.60 1.50 0.35 0.95 1.9 TYP. MAX. 1.45 0.15 1.30 0.50 0.20 3.00 3.00 1.75 0.55 MIN. 35.4 0.0 35.4 13.7 3.5 110.2 102.3 59.0 13.7 37.4 74.8 mils TYP. MAX. 57.1 5.9 51.2 19.7 7.8 118.1 118.1 68.8 21.6
DIM.
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