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Details, datasheet, quote on part number:74VHV02N
 
 
Part:74VHV02N
Description:Ic-74vhc Series
Company:
Datasheet:Download 74VHV02N datasheet   File size : 82 kB
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Datasheet text preview:
74VHC02 Quad 2-Input NOR Gate

November 1992 Revised March 1999

74VHC02 Quad 2-Input NOR Gate
General Description
The VHC02 is an advanced high-speed CMOS 2-Input NOR Gate fabricated with silicon gate CMOS technology. It achieves the high-speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The internal circuit is composed of 3 stages, including buffer output, which provide high noise immunity and stable output. An input protection circuit insures that 0V to 7V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5V to 3V systems and two supply systems such as battery backup. This circuit prevents device destruction due to mismatched supply and input voltages.

Features
s High Speed: tPD = 3.6 ns (typ) at VCC = 5V s Low power dissipation: ICC = 2 µA (max) at TA = 25°C s High noise immunity: VNIH = VNIL = 28% VCC (min) s Power down protection is provided on all inputs s Low noise: VOLP = 0.8V (max) s Pin and function compatible with 74HC02

Ordering Code:
Order Number 74VHC02M 74VHC02SJ 74VHC02MTC 74VHC02N Package Number M14A M14D MTC14 N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150" Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.

Logic Symbol
IEEE/IEC

Connection Diagram

Pin Descriptions
Pin Names An , Bn On Description Inputs Outputs

Truth Table
A L L H H B L H L H O H L L L

© 1999 Fairchild Semiconductor Corporation

DS011515.prf

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74VHC02

Absolute Maximum Ratings(Note 1)
Supply Voltage (VCC) DC Input Voltage (VIN) DC Output Voltage (VOUT) Input Diode Current (IIK) Output Diode Current (IOK) DC Output Current (IOUT ) DC VCC/GND Current (ICC) Storage Temperature (TSTG) Lead Temperature (TL) (Soldering, 10 seconds) 260°C -0.5V to +7.0V -0.5V to +7.0V -0.5V to VCC + 0.5V -20 mA ±20 mA ±25 mA ±50 mA -65°C to +150°C

Recommended Operating Conditions (Note 2)
Supply Voltage (VCC) Input Voltage (VIN) Output Voltage (VOUT) Operating Temperature (TOPR) Input Rise and Fall Time (tr, tf) VCC = 3.3V ± 0.3V VCC = 5.0V ± 0.5V 0 100 ns/V 0 20 ns/V 2.0V to +5.5V 0V to +5.5V 0V to VCC -40°C to +85°C

Note 1: Absolute Maximum Ratings are values beyond which the device may be damaged or have its useful life impaired. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation outside databook specifications. Note 2: Unused inputs must be held HIGH or LOW. They may not float.

DC Electrical Characteristics
Symbol VIH VIL VOH Parameter HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Voltage VCC (V) 2.0 3.0 - 5.5 2.0 3.0 - 5.5 2.0 3 .0 4.5 3.0 4.5 VOL LOW Level Output Voltage 2.0 3 .0 4.5 3.0 4.5 IIN ICC Input Leakage Current Quiescent Supply Current 0 - 5.5 5.5 1 .9 2.9 4 .4 2 .58 3 .94 0.0 0.0 0.0 0.1 0 .1 0.1 0.36 0.36 ±0.1 2 .0 2.0 3.0 4.5 TA = 25°C Min 1 .50 0.7 VCC 0.50 0 .3 V CC 1 .9 2.9 4 .4 2 .48 3 .80 0.1 0.1 0.1 0.44 0.44 ±1.0 20.0 V µA µA IOL = 4 mA IOL = 8 mA VIN = 5.5V or GND VIN = VCC or GND V V IOH = -4 mA IOH = -8 mA VIN = VIH IOL = 50 µA or VIL V Typ Max TA = -40°C to +85°C Min 1 .50 0.7 VCC 0.50 0.3 VCC Max Units V V VIN = VIH IOH = -50 µA or VIL Conditions

Noise Characteristics
Symbol VOLP (Note 3) VOLV (Note 3) VIHD (Note 3) VILD (Note 3) Parameter Quiet Output Maximum Dynamic VOL Quiet Output Minimum Dynamic VOL Minimum HIGH Level Dynamic Input Voltage Maximum LOW Level Dynamic Input Voltage 5.0 1 .5 V CL = 50 pF 5.0 3.5 V CL = 50 pF 5 .0 -0.3 -0.8 V CL = 50 pF VCC (V) 5 .0 TA = 25°C Typ 0.3 Limits 0 .8 Units V CL = 50 pF Conditions

Note 3: Parameter guaranteed by design.

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74VHC02

AC Electrical Characteristics
Symbol tPHL tPLH 5.0 ± 0.5 CIN CPD Input Capacitance Power Dissipation Capacitance
Note 4: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr.) = CPD * VCC * fIN + ICC/4 (per gate).

Parameter Propagation Delay

VCC (V) 3.3 ± 0.3

TA = 25°C Min Typ 5.6 8.1 3 .6 5.1 4 15 Max 7 .9 11.4 5.5 7 .5 10

TA = -40°C to +85°C M in 1.0 1.0 1.0 1.0 Max 9 .5 13.0 6.5 8 .5 10

Units ns ns pF pF

Conditions CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF VCC = Open (Note 4)

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74VHC02

Physical Dimensions inches (millimeters) unless otherwise noted

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150" Narrow Package Number M14A

14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D

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74VHC02

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package MTC14

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