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Part: 80C32X

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Philips Semiconductors

Product specification

CMOS single-chip 8-bit microcontrollers

80C32/87C52

DESCRIPTION
The Philips 80C32/87C52 is a high-performance microcontroller fabricated with Philips high-density CMOS technology. The Philips CMOS technology combines the high speed and density characteristics of HMOS with the low power attributes of CMOS. Philips epitaxial substrate minimizes latch-up sensitivity. The 87C52 contains an 8k × 8 EPROM and the 80C32 is ROMless. Both contain a 256 × 8 RAM, 32 I/O lines, three 16-bit counter/timers, a six-source, two-priority level nested interrupt structure, a serial I/O port for either multi-processor communications, I/O expansion or full duplex UART, and on-chip oscillator and clock circuits. In addition, the 80C32/87C52 has two software selectable modes of power reduction--idle mode and power-down mode. The idle mode freezes the CPU while allowing the RAM, timers, serial port, and interrupt system to continue functioning. The power-down mode saves the RAM contents but freezes the oscillator, causing all other chip functions to be inoperative. See 80C52/80C54/80C58 datasheet for ROM device specifications.

PIN CONFIGURATIONS
P1.0/T2 P1.1/T2EX P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RST RxD/P3.0 TxD/P3.1 INT0/P3.2 INT1/P3.3 T0/P3.4 T1/P3.5 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 CERAMIC AND PLASTIC DUAL IN-LINE PACKAGE 40 VDD 39 P0.0/AD0 38 P0.1/AD1 37 P0.2/AD2 36 P0.3/AD3 35 P0.4/AD4 34 P0.5/AD5 33 P0.6/AD6 32 P0.7/AD7 31 EA/V PP 30 ALE/PROG 29 PSEN 28 P2.7/A15 27 P2.6/A14 26 P2.5/A13 25 P2.4/A12 24 P2.3/A11 23 P2.2/A10 22 P2.1/A9 21 P2.0/A8

FEATURES

· 80C51 based architecture · 8032 compatible
­ 8k × 8 EPROM (87C52) ­ ROMless (80C32) ­ 256 × 8 RAM ­ Three 16-bit counter/timers ­ Full duplex serial channel ­ Boolean processor

WR/P3.6 RD/P3.7 XTAL2 XTAL1 V SS

SU00060

· Memory addressing capability
­ 64k ROM and 64k RAM

· Power control modes:
­ Idle mode ­ Power-down mode

· CMOS and TTL compatible · Three speed ranges:
­ 3.5 to 16MHz ­ 3.5 to 24MHz ­ 3.5 to 33MHz

· Five package styles · Extended temperature ranges · OTP package available

1996 Aug 16

3-166

853­1562 17195

Philips Semiconductors

Product specification

CMOS single-chip 8-bit microcontrollers

80C32/87C52

ORDERING INFORMATION
ROMless P80C32EBP N P80C32EBA A EPROM1 P87C52EBP N P87C52EBA A P87C52EBF FA P87C52EBL KA P80C32EBB B P80C32EFP N P80C32EFA A P87C52EBB B P87C52EFP N P87C52EFA A P87C52EFF FA P80C32EFB B P80C32IBP N P80C32IBA A P80C32IBB B P87C52IBF FA P87C52IBL KA P80C32IFP N P80C32IFA A P80C32IFB B P87C52IFF FA P80C32NBA A P80C32NBP N P80C32NBB B P80C32NFA A P80C32NFP N P80C32NFB B UV P87C52IFP N P87C52IFA A UV UV OTP OTP P87C52EFB B P87C52IBP N P87C52IBA A OTP OTP UV UV OTP OTP OTP UV OTP OTP OTP TEMPERATURE RANGE °C AND PACKAGE 0 to +70, Plastic Dual In-line Package 0 to +70, Plastic Leaded Chip Carrier 0 to +70, Ceramic Dual In-line Package 0 to +70, Ceramic Leaded Chip Carrier 0 to +70, Plastic Quad Flat Pack ­40 to +85, Plastic Dual In-line Package ­40 to +85, Plastic Leaded Chip Carrier ­40 to +85, Ceramic Dual In-line Package ­40 to +85, Plastic Quad Flat Pack 0 to +70, Plastic Dual In-line Package 0 to +70, Plastic Leaded Chip Carrier 0 to +70, Plastic Quad Flat Pack 0 to +70, Ceramic Dual In-line Package 0 to +70, Ceramic Leaded Chip Carrier ­40 to +85, Plastic Dual In-line Package ­40 to +85, Plastic Leaded Chip Carrier ­40 to +85, Plastic Quad Flat Pack ­40 to +85, Ceramic Dual In-line Package 0 to +70, Plastic Leaded Chip Carrier 0 to +70, Plastic Dual In-line Package 0 to +70, Plastic Quad Flat Pack ­40 to +85, Plastic Leaded Chip Carrier ­40 to +85, Plastic Dual In-line Package ­40 to +85, Plastic Quad Flat Pack FREQ MHz 16 16 16 16 16 16 16 16 16 24 24 24 24 24 24 24 24 24 33 33 33 33 33 33 DRAWING NUMBER SOT129-1 SOT187-2 0590B 1472A SOT307-2 SOT129-1 SOT187-2 0590B SOT307-2 SOT129-1 SOT187-2 SOT307-2 0590B 1472A SOT129-1 SOT187-2 SOT307-2 0590B SOT187-2 SOT129-1 SOT307-2 SOT187-2 SOT129-1 SOT307-2

NOTE: 1. OTP = One Time Programmable EPROM. UV = UV erasable EPROM 2. For 33MHz ROM 80C52 operation, see 80C52/80C54/80C58 data sheet.

1996 Aug 16

3-167

Philips Semiconductors

Product specification

CMOS single-chip 8-bit microcontrollers

80C32/87C52

CERAMIC AND PLASTIC LEADED CHIP CARRIER PIN FUNCTIONS
6 1 40

PLASTIC QUAD FLAT PACK PIN FUNCTIONS
44 34

7

39

1

33

LCC 11 17 29

PQFP

23

18 Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Function NC* T2/P1.0 T2EX/P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RST RxD/P3.0 NC* TxD/P3.1 INT0/P3.2 INT1/P3.3 Pin 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 Function T0/P3.4 T1/P3.5 WR/P3.6 RD/P3.7 XTAL2 XTAL1 V SS NC* P2.0/A8 P2.1/A9 P2.2/A10 P2.3/A11 P2.4/A12 P2.5/A13 P2.6/A14

28 Pin 31 32 33 34 35 36 37 38 39 40 41 42 43 44 Function P2.7/A15 PSEN ALE/PROG NC* EA/VPP P0.7/AD7 P0.6/AD6 P0.5/AD5 P0.4/AD4 P0.3/AD3 P0.2/AD2 P0.1/AD1 P0.0/AD0 VCC Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Function P1.5 P1.6 P1.7 RST RxD/P3.0 NC* TxD/P3.1 INT0/P3.2 INT1/P3.3 T0/P3.4 T1/P3.5 WR/P3.6 RD/P3.7 XTAL2 XTAL1

12 Pin 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 Function V SS NC* P2.0/A8 P2.1/A9 P2.2/A10 P2.3/A11 P2.4/A12 P2.5/A13 P2.6/A14 P2.7/A15 PSEN ALE/PROG NC* EA/VPP P0.7/AD7

22 Pin 31 32 33 34 35 36 37 38 39 40 41 42 43 44 Function P0.6/AD6 P0.5/AD5 P0.4/AD4 P0.3/AD3 P0.2/AD2 P0.1/AD1 P0.0/AD0 VCC NC* T2/P1.0 T2EX/P1.1 P1.2 P1.3 P1.4

* DO NOT CONNECT

SU00061

* DO NOT CONNECT

SU00062

LOGIC SYMBOL
VCC XTAL1 PORT 0 ADDRESS AND DATA BUS V SS

XTAL2 T2 T2EX RST EA/VPP PSEN SECONDARY FUNCTIONS ALE/PROG RxD TxD INT0 INT1 T0 T1 WR RD PORT 1 PORT 2

PORT 3

ADDRESS BUS

SU00063

1996 Aug 16

3-168

Philips Semiconductors

Product specification

CMOS single-chip 8-bit microcontrollers

80C32/87C52

BLOCK DIAGRAM
P0.0­P0.7 P2.0­P2.7

PORT 0 DRIVERS V CC VS S RAM ADDR REGISTER RAM PORT 0 LATCH

PORT 2 DRIVERS

PORT 2 LATCH

ROM/ EPROM

B REGISTER

ACC

STACK POINTER

TMP2

TMP1

PROGRAM ADDRESS REGISTER

ALU

PCON T2CON TL1

SCON TH0 TH2

TMOD TL0 TL2 IE

TCON TH1 RCAP2H IP

BUFFER

PSW

RCAP2L SBUF

INTERRUPT, SERIAL PORT AND TIMER BLOCKS

PC INCREMENTER

PROGRAM COUNTER PSEN ALE EA RST PD TIMING AND CONTROL INSTRUCTION REGISTER

DPTR

PORT 1 LATCH

PORT 3 LATCH

OSCILLATOR PORT 1 DRIVERS XTAL1 XTAL2 P1.0­P1.7 PORT 3 DRIVERS

P3.0­P3.7

SU00064

1996 Aug 16

3-169

Philips Semiconductors

Product specification

CMOS single-chip 8-bit microcontrollers

80C32/87C52

Table 1.
SYMBOL ACC* B* DPTR: DPH DPL

8XC52 Special Function Registers
DESCRIPTION Accumulator B register Data pointer (2 bytes) Data pointer high Data pointer low DIRECT BIT ADDRESS, SYMBOL, OR ALTERNATIVE PORT FUNCTION ADDRESS MSB LSB E0H F0H 83H 82H AF AE ­ BE ­ AD ET2 BD PT2 AC ES BC PS AB ET1 BB PT1 AA EX1 BA PX1 A9 ET0 B9 PT0 A8 EX0 B8 PX0 xx000000B 0x000000B E7 F7 E6 F6 E5 F5 E4 F4 E3 F3 E2 F2 E1 F1 E0 F0 RESET VALUE 00H 00H 00H 00H

IE*

Interrupt enable

A8H

EA BF

IP*

Interrupt priority

B8H

­

87 P0* Port 0 80H AD7

86 AD6

85 AD5

84 AD4

83 AD3

82 AD2

81 AD1

80 AD0 FFH

97 P1* Port 1 90H ­

96 ­

95 ­

94 ­

93 ­

92 ­

91 T2EX

90 T2 FFH

A7 P2* Port 2 A0H A15

A6 A14

A5 A13

A4 A12

A3 A11

A2 A10

A1 A9

A0 A8 FFH

B7 P3* PCON1 Port 3 Power control B0H 87H RD SMOD

B6 WR ­

B5 T1 ­

B4 T0 ­

B3 INT1 GF1

B2 INT0 GF0

B1 TxD PD

B0 RxD IDL FFH 0xxxxxxxB

D7 PSW* RCAP2H# RCAPL# SBUF Program status word Capture high Capture low Serial data buffer D0H CBH CAH 99H 9F SCON* SP Serial controller Stack pointer 98H 81H 8F TCON* Timer control 88H TF1 SM0 CY

D6 AC

D5 F0

D4 RS1

D3 RS0

D2 OV

D1 ­

D0 P 00H 00H 00H xxxxxxxxB

9E SM1

9D SM2

9C REN

9B TB8

9A RB8

99 TI

98 RI 00H 07H

8E TR1

8D TF0

8C TR0

8B IE1

8A IT1

89 IE0

88 IT0 00H

CF T2CON*# TH0 TH1 TH2# TL0 TL1 TL2# Timer 2 control Timer high 0 Timer high 1 Timer high 2 Timer low 0 Timer low 1 Timer low 2 C8H 8CH 8DH CDH 8AH 8BH CCH TF2

CE EXF2

CD RCLK

CC TCLK

CB EXEN2

CA TR2

C9 C/T2

C8 CP/RL2 00H 00H 00H 00H 00H 00H 00H

TMOD Timer mode 89H GATE C/T M1 M0 GATE * Bit addressable # SFRs are modified from or added to the 80C51 SFRs. 1. Bits GF1, GF0, PD, and IDL of the PCON register are not implemented in the NMOS 8XC52.

C/T

M1

M0

00H

1996 Aug 16

3-170




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