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Part: CXA1855
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CXA1855Q/S
I2C Bus-Compatible Audio/Video Switch
Description T h e CXA1855Q/S is a 5-input, 3-output audio/video switch featuring I2C bus compatibility for TVs. Features · Serial control with I2C bus · 5 inputs, 3 outputs · Desired inputs can each be independently selected for 3 outputs · Separate control of video and audio switches · 6 dB gain amplifiers for video system · Wideband video amplifier (20 MHz, 3 dB) · Y/C mixer circuit · Slave address can be changed (90H/92H) · Audio muting from external pin · High impedance maintained by I2C bus line (SDA, SCL) even when power is OFF. · Wide audio dynamic range (3 Vrms typ.) Applications Audio/video switch featuring I2C bus compatibility for TVs. Pin Configuration (Top View)
QFP 48pin 36 BIAS 35 TRAP1 34 VOUT1 33 LOUT1 32 ROUT1 31 YIN1 SDIP 48pin 30 GND 29 CIN1 28 MUTE 27 EV 26 REV 25 LEV 1 V1 LTV 48 TV 47 RTV 46 COUT1 45 VCC 44 YOUT1 43 BIAS 42 TRAP1 41 VOUT1 40 LOUT1 39 CXA1855S ROUT1 38 YIN1 37 GND 36 CIN1 35 MUTE 34 EV 33 REV 32 LEV 31 TRAP2 30 VOUT2 29 LOUT2 28 YOUT2 27 ROUT2 26 COUT2 25 2 LV1 3 4 5 6 7 8 9 LOUT3 18 VOUT3 17 ROUT3 16 ADR 15 SDA 14 SCL 13 RV2 RV3 LV2 LV3 C2 C3 V2 Y2 S2 V3 Y3 S3 Y1 RV1 C1 S1 V2 LV2 Y2
CXA1855Q 48 pin QFP (Plastic)
CXA1855S 48 pin SDIP (Plastic)
Absolute Maximum Ratings (Ta=25 °C) · Supply voltage VCC 12 V · Operating temperature Topr 20 to +75 °C · Storage temperature Tstg 65 to +150 °C · Allowable power dissipation PD 750 (QFP) mW 1800 (SDIP) mW Operating Conditions Supply voltage
VCC
9±0.5
V
Structure Bipolar silicon monolithic IC
37 YOUT1 38 VCC 39 COUT1 40 RTV 41 TV 42 LTV 43 V1 44 LV1 45 Y1 46 RV1 47 C1 48 S1
TRAP2 24 VOUT2 23 LOUT2 22 YOUT2 21 ROUT2 20 CXA1855Q COUT2 19
10 RV2 11 C2 12 S2 13 V3 14 LV3 15 Y3 16 RV3 17 C3 18 S3 19 SCL 20 SDA 21 ADR 22 ROUT3 23 VOUT3 24 LOUT3
1
2
3
4
5
6
7
8
9
10
11
12
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
--1--
E93416D79-TE
CXA1855Q/S
Block Diagram
Parenthesized numbers indicate Pin No. of CXA1855S. (47) (33) (1) (7) (13) TV 41 EV 27 V1 43 V2 1 V3 7 0dB 35 TRAP1 (41) 0dB 6dB 39 COUT1 (45) (3) (9) Y1 45 Y2 3 6dB 23 VOUT2 (29) 6dB 21 YOUT2 (27) 0dB 24 TRAP2 (30) 0dB (5) (11) (17) C1 47 C2 5 C3 11 6dB 17 VOUT3 (23) 6dB 38 VCC (44) 6dB 30 GND (36) 6dB 19 COUT2 (25) 29 CIN1 (35) 6dB 6dB
34 VOUT1 (40) 31 YIN1 (37) 37 YOUT1 (43)
(15) Y3 9
BIAS
36 BIAS (42) 33 LOUT1 (39) 32 ROUT1 (38) 6dB 22 LOUT2 (28) 20 ROUT2 (26)
(48) LTV 42 (31) LEV 25 (2) LV1 44 (8) LV2 2 (14) LV3 8 6dB
6dB
18 LOUT3 (24) 16 ROUT3 (22)
(46) RTV 40 (32) REV 26 (4) RV1 46 (10) RV2 4 (16) RV3 10
6dB
13 SCL (19) 14 SDA (20)
6dB Logic 6dB
15 ADR (21) 48 S1 (6) 6 S2 (12) 12 S3 (18) 28 MUTE (34)
Note) A total gain of 0 dB is achieved by connecting a 6 k resistor to the each audio input. --2--
CXA1855Q/S
Pin Description Pin No. Symbol Pin voltage
Parenthesized numbers indicate Pin No. of CXA1855S. Equivalent circuit
VCC
Description
41 (47) 27 (33) 43 (1) 1 (7) 7 (13)
TV EV V1 V2 V3
41 27 150
20k
4.5 V
43 1 7
Video signal inputs. Input composite video signals.
28k
45 (3) 3 (9) 9 (15) 47 (5) 5 (11) 11 (17)
Y1 Y2 Y3 C1 C2 C3
VCC 45 3 150 28k 20k
4.5 V
9 47 5 11
Y/C separation signal inputs. Y1 to Y3 pins : Input luminance signals. C1 to C3 pins : Input chrominance signals.
42 (48) 25 (31) 44 (2) 2 (8) 8 (14) 40 (46) 26 (32) 46 (4) 4 (10) 10 (16)
LTV LEV LV1 LV2 LV3 RTV REV RV1 RV2 RV3
42 25 44 VCC
4.6 V
4 10
2 8
27k 33k
Audio signals inputs.
26 46
15k
40
VCC
34 (40) VOUT1 23 (29) VOUT2 17 (23) VOUT3
34
4.5 V
23 17
Video signal outputs. Output composite video signals.
--3--
CXA1855Q/S
Pin No.
Symbol
Pin voltage
Equivalent circuit
VCC
Description
37 (43) 21 (27) 39 (45) 19 (25)
YOUT1 YOUT2 COUT1 COUT2
37
4.5 V
21 39 19
Y/C signal outputs. YOUT1, YOUT2 pins : Output luminance signals. COUT1, COUT2 pins : Output chrominace signals.
VCC 20k
31 (37) YIN1 29 (35) CIN1
4.5 V
150 31 29 28k
Input the Y/C separated signal of VOUT1 output.
VCC 20k 150 20k
36 (42) BIAS
4.5 V
36
Internal reference bias (VCC/2). A capacitor is connected between this pin and GND.
VCC
35 (41) TRAP1 24 (30) TRAP2
4.5 V
100 35 24 1k
Connect the subcarrier trap circuits.
VCC
33 (39) 22 (28) 18 (24) 32 (38) 20 (26) 16 (22)
LOUT1 LOUT2 LOUT3 ROUT1 ROUT2 ROUT3
33 22 18 56 20k 22k VCC
4.6 V
32 20 16
Audio signal outputs. ZOUT=50 (Within DC ±2 mA)
20k
--4--
CXA1855Q/S
Pin No.
Symbol
Pin voltage
Equivalent circuit
Description
VCC 4k
13 (19) SCL
--
13
I2C bus signal input. VIL=1.5 V (max.) VIH=3.0 V (min.)
10.5k
VCC
4k
14 (20) SDA
--
14
10.5k
I2C bus signal input/output. VIL=1.5 V (max.) VIH=3.0 V (min.) VOL=0.4 V (max.)
VCC 150 72k 28k
15 (21) ADR
--
15
Selects the slave address for the I2C bus. 90H at 1.5 V or less 92H at 2.5 V or more 90H when open
VCC
48 (6) S1 6 (12) S2 12 (18) S3
--
48 6 12 100k
Video/S signal selection. S signal output at 0.8 V or less Video signal output at 1.4 V or more S signal output when open
VCC 150 72k 28k
28 (34) MUTE
--
28
Audio output mute. Mute OFF at 1.5 V or less Mute ON at 2.5 V or more Mute OFF when open
--5--
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