Details, datasheet, quote on part number: HN58C256AP85
DescriptionIc-sm-256k CMOS Eeprm
DatasheetDownload HN58C256AP85 datasheet
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Features, Applications

The Hitachi HN58C256A and HN58C257A are electrically erasable and programmable ROMs organized 8-bit. They have realized high speed low power consumption and high reliability by employing advanced MNOS memory technology and CMOS process and circuitry technology. They also have a 64-byte page programming function to make their write operations faster.


Single 5 V supply: V 10% Access time: ns/100 ns (max) Power dissipation Active: 20 mW/MHz, (typ) Standby: 110 W (max) On-chip latches: address, data, CE, OE, WE Automatic byte write: 10 ms max Automatic page write (64 bytes): 10 ms max Ready/Busy (only the HN58C257A series) Data polling and Toggle bit Data protection circuit on power on/off Conforms to JEDEC byte-wide standard Reliable CMOS with MNOS cell technology 105 erase/write cycles (in page mode) 10 years data retention Software data protection Write protection by RES pin (only the HN58C257A series) Industrial versions (Temperature range: to 85C and to 85 C) are also available.

Type No. HN58C257AT-85 HN58C257AT-10 Access time 100 ns Package 600 mil 28-pin plastic DIP (DP-28) 400 mil 28-pin plastic SOP (FP-28D) 28-pin plastic TSOP mm2 32-pin plastic TSOP (TFP-32DA)

HN58C256AP/AFP Series I/O1 I/O2 VSS (Top view) VCC I/O1 I/O2 VSS CE A10 (Top view) HN58C257AT Series I/O1 I/O2 VSS CE A10 (Top view) A12 A14 RDY/Busy VCC RES OE HN58C256AT Series A12 A14 VCC A11 OE

Function Address input Data input/output Output enable Chip enable Write enable Power supply Ground Ready busy Reset No connection

Note: This function is supported by only the HN58C257A series.
I/O buffer and input latch Control logic and timing


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