Details, datasheet, quote on part number: MC44250
PartMC44250
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Features, Applications

Advance Information Bus Controlled Multistandard Video Processor

The Motorola MC44011, a member of the MC44000 Chroma 4 family, is designed to provide RGB or YUV outputs from a variety of inputs. The inputs can be composite video (two inputs), SVHS, RGB, and color difference (RY, BY). The composite video can be PAL and/or NTSC as the MC44011 is capable of decoding both systems. Additionally, RY and BY outputs and inputs are provided for use with a delay line where needed. Sync separators are provided at all video inputs. In addition, the MC44011 provides a sampling clock output for use by a subsequent triple A/D converter system which digitizes the RGB/YUV outputs. The sampling clock to 40 MHz) is phaselocked to the horizontal frequency. Additional outputs include composite sync, vertical sync, field identification, luma, burst gate, and horizontal frequency. Control of the MC44011, and reading of status flags, is via an I2C bus. Accepts NTSC and PAL Composite Video, SVHS, RGB, and RY, BY

Includes Luma and Chroma Filters, Luma Delay Lines, and Sound Traps Digitally Controlled via I2C Bus RY, BY Inputs for Alternate Signal Source LineLocked Sampling Clock for A/D Converters Burst Gate, Composite Sync, Vertical Sync and Field Identification Outputs RGB/YUV Outputs can Provide 3.0 Vpp for A/D Inputs Overlay Capability Single Power Supply: 550 mW (Typical) 44 Pin PLCC and QFP Packages Representative Block Diagram

Outputs VCC1 Comp Video 1 Comp Video Gnd1 Y1 RY BY 4 Input Select Sound Trap/Luma Filter/Luma Delay/ Chroma Filter/PAL and NTSC Decoder/Hue and Saturation Control

Color Difference Stage Contrast, Brightness, Saturation Control DACs Data Bus

Sync Separator Vertical Output Field ID 17.7 MHz Oscillator 14.3 MHz Filter PLL Burst Gate Vertical Decoder

I2C Data Interface/ Registers PLL #2 Pixel Clock PLL/VCO

This document contains information on a new product. Specifications and information herein are subject to change without notice.

Outputs Inputs System Select Y1 Clamp 32 To Sync Sep Clamp Burst Gate Clamp BY RY Signal Selection Y Blank 20 5.0 Color Matrix and Controls 5.0 22 B/U G/Y Outputs R/V BY RY R 5.0 Clamp 23 C PAL/NTSC Decoder Ident BY RY Saturation/ Hue DACs (5.0 V) Clamp Y1 33 BY 41 RY 42 RY 31 BY 25 34 Ident Filter 43

Luma Delay C Chroma Trap & Luma Peaking C Adj. Luma Delay X8 Fs Notch Chroma Filter ACC PAL/NTSC/SVHS Decoder Adaptive Sync Separator & Selector C From RGB & Y2 Inputs Sync Separator & Selector DACs Sync Separator Vertical Decoder 2Fh Comp Sync Bus Control & Flag Status Read 16Fh Line Counter & Decoder 525, 625 Coincidence Counter Vert. Sync Separator Saturation Contrast Blue Gain Red Gain Brightness Red DC Blue DC Color Difference Stage C PLL #1 16Fh Blank 64 2Fh Phase Det Calibration Circuit VCO PLL #2 Voltage Monitor U Phase & Frequency D Comparator Charge Pump 1240 MHz VCO I 2C Data Interface/ Registers 5 6 SCL SDL 11 H Fil Quiet GND 16Fh/ S/C CSync Burst Gate 14 Fh Ref 15 k Ret 16 PLL #2 Filter Frequency Divider 18 Clock To A/D Converters (5.0 V)

ELECTRICAL CHARACTERISTICS (The tested electrical characteristics are based on the conditions shown in Table 1 and 2. Composite Video input signal = 1.0 Vpp, composed of: 0.7 Vpp BlacktoWhite; 0.3 Vpp SynctoBlack; 0.3 Vpp Color Burst. 5.0 V, Iref 32 A (Pin 9), unless otherwise noted.) Table 1. Control Bit Test Settings

Control Bit 6 $7F7, Name SVHSY SVHSC FSI L2 GATE BLCP L1 GATE 36/68 s CalKill HI, VI Xtal SSD T1, T2 SSC SSA, SSB D1, D2 RGB Y1 EN YUV EN L2 Gain L1 Gain H Switch 525/625 Fosc 2 CSync Vin Sync EN Y2 Sync V2/V1 RGB Sync Value Composite Video input selected. Composite Video input selected. 50 Hz Field Rate selected. PLL #2 Gating enabled. Clamp Pulse Gating enabled. Vertical Gating enabled. Vertical section AutoCountdown mode Time from beginning of Line 4 to Vertical Sync is 36 s. Horizontal Calibration Loop enabled. Normal = 17.7 MHz crystal selected, = 14.3 MHz crystal selected. Normal Sound Trap Notch filter set to 5.5 MHz (with 17.7 MHz crystal). Permits PAL and NTSC selection. 1 = PAL decoding, 1,0 = NTSC decoding Sets Luma Peaking at 0 dB. Set Luma Delay to minimum Fast Commutate input can enable RGB inputs. Y2 input (Pin 29) deselected Y1 luma path from PAL/NTSC decoder selected. RGB output mode selected Disable luma matrix from RGB inputs. Set PLL #2 Phase/Frequency detector gain high. Set PLL #1 Phase Detector gain high. Set Horizontal Phase Detector filter switch open. = 625 lines (PAL), = 525 lines (NTSC) Select direct VCO output from PLL 16 Fh output selected at Pin 13. Composite Video inputs (Pin or 3) Sync Source selected. Enabled Horizontal Timebase. Y2 sync source not selected. Select Video 1 input (Pin 1). RGB inputs Sync Source not selected. Function

Function RY/BY Gain Sub Carrier Phase Blue Output DC Bias Red Output DC Bias Pixel Clock VCO Gain Blue Contrast Trim Main Contrast

Function Red Contrast Trim Blue Brightness Trim Main Brightness Red Brightness Trim Saturation (Color Diff.) Saturation (Decoder) Hue


 

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