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Details, datasheet, quote on part number:NCO8703
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Datasheet text preview:
APPLICATION NOTE
A wideband linear power amplifier (1.6 - 28 MHz) for 300 W PEP with 2 MOS transistors BLF177
NCO8703
Philips Semiconductors
A wideband linear power amplifier (1.6 - 28 MHz) for 300 W PEP with 2 MOS transistors BLF177
CONTENTS 1 2 3 3.1 3.2 3.2.1 3.2.2 3.2.3 3.2.4 3.3 3.3.1 3.3.2 3.3.3 3.3.4 4 5 5.1 5.2 6 7 8 SUMMARY INTRODUCTION DESIGN OF THE AMPLIFIER General Output circuit Load impedance Output transformer The tapped choke Tuning of the output circuit Input circuit Input impedance Input matching circuit Input transformer Tuning of the inputcircuit CONSTRUCTION OF THE AMPLIFIER MEASURED PERFORMANCE Single tone measurements Two tone measurements BALANCED CIRCUIT CONCLUSIONS REFERENCES
Application Note NC08703
1998 Mar 23
2
Philips Semiconductors
A wideband linear power amplifier (1.6 - 28 MHz) for 300 W PEP with 2 MOS transistors BLF177
1 SUMMARY
Application Note NC08703
This report gives a description of a wideband push-pull amplifier for the frequency range 1.6 - 28 MHz. The amplifier has been designed around 2 MOS transistors BLF177 which operate in class-AB at VDS = 50 V and IDQ = 0.5 A/transistor. The main properties at PO = 300 W are: Powergain: 22 to 23 dB Efficiency: 52.5 to 61% Return losses input: -15.5 dB 2nd harmonics: -25 dB 3rd harmonics: -16 dB IMD at PO = 300 W PEP: -33 dB. 2 INTRODUCTION
The BLF177 is an RF Power MOS transistor for the HF and VHF range in a 4 leads flange SOT121 encapsulation. For the frequency range 1.6 - 28 MHz a wideband push-pull power amplifier has been developed with 2 × BLF177 having an output power of 300 W PEP at an intermodulation distortion level below -30 dB. The transistors operate in class-AB at VDS = 50 V and a quiescent current of 0.5 A each. 3 3.1 DESIGN OF THE AMPLIFIER General
The schematic set-up is given in Fig.1.
handbook, full pagewidth
50
RF INPUT MATCHING & GAIN EQUALIZATION
50
MGM391
Fig.1 Schematic set-up 2 × BLF177 amplifier.
The two balance to unbalance transformers are applied to split the single ended input into 2 out of phase driving ports and to add the 2 out of phase output ports into one single ended output. The transformers have an impedance transformation ratio of 4 : 1 and match the low-ohmic in- and output impedance of the transistors to the 50 system impedance. At the input a special circuit takes care of a good input matching and a flat powergain over the whole bandwidth.
1998 Mar 23
3
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