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Details, datasheet, quote on part number:NE5900DK
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Datasheet text preview:
Philips Semiconductors
Product specification
Call progress decoder
NE5900
DESCRIPTION
The NE5900 call progress decoder (CPD) is a low cost, low power CMOS integrated circuit designed to interface with a microprocessor-controlled smart telephone capable of making preprogrammed telephone calls. The call progress decoder information to permit microprocessor decisions whether to initiate, continue, or terminate calls. A tri-state, 3-bit output code indicates the presence of dial tone, audible ring-back, busy signal, or re-order tones. A front-end bandpass filter is accomplished with switched capacitors. The bandshaped signal is detected and the cadence is measured prior to output decoding. In addition to the three data bits, a buffered bandpass output and envelope output are available. All logic inputs and outputs can interface with LSTTL, CMOS and NMOS. Circuit features include low power consumption and easy application. Few and inexpensive external components are required. A typical application requires a 3.58MHz crystal or clock, 470k resistor, and two bypass capacitors. The NE5900 is effective where traditional call progress tones, PBX tones, and precision call progress tones must be correctly interpreted with a single circuit.
PIN CONFIGURATION
D1 and N Packages
INPUT V REF EXT CLOCK IN/XTAL1 XTAL2 TEST IN CLEAR IN COUNT IN PROGRESS 0V 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 5V ANALOG OUT TRI-STATE ENABLE ENVELOPE BIT 1 BIT 2 BIT 3 DATA VALID
TOP VIEW NOTE: 1. SOL -- Released in large SO package only.
SR01142
Figure 1. Pin Configuration
APPLICATIONS
FEATURES
· Fully decoded tri-state call progress status output · Works with traditional, precision, or PBX call progress tones · Low power consumption · Low cost 3.58MHz crystal or clock · No calibration or adjustment · Interfaces with LSTLL, CMOS, NMOS · Easy application
ORDERING INFORMATION
DESCRIPTION 16-Pin Plastic Small Outline (SOL) Package 16-Pin Plastic Dual In-Line (DIP) Package
· Modems · PBXs · Security equipment · Auto dialers · Answering machines · Remote diagnostics · Pay telephones
TEMPERATURE RANGE 0 to +70°C 0 to +70°C
ORDER CODE NE5900DK NE5900N
DWG # SOT162-1 SOT38-4
1986 May 8
1
853-0842 83667
Philips Semiconductors
Product specification
Call progress decoder
NE5900
BLOCK DIAGRAM
ANALOG OUT 0V V REF 5V
10k INPUT FILTER DETECTOR
10k
TRI-STATE ENABLE
ENVELOPE
EXT CLOCK IN/XTAL1 TIMING DECODER TRI-STATE
BIT 1
BIT 2
XTAL2
BIT 3
TEST IN
CLEAR IN
COUNT IN PROGRESS
DATA VALID
SR01143
Figure 2. NE5900 Block Diagram
ABSOLUTE MAXIMUM RATINGS
SYMBOL VDD VIN VIN VOUT TSTG TA TSOLD TJMAX Supply voltage Logic control input voltages All other input voltages1 PARAMETER RATING 9 -0.3 to +16 -0.3 to VCC + 0.3 -0.3 to VCC + 0.3 -65 to +150 0 to +70 +300 +150 UNITS V V V V °C °C °C °C
Output voltages Storage temperature range Operating temperature range Lead soldering temperature (10s) Junction temperature
NOTE: 1. Includes Pin 3 -- Ext Clock In
1986 May 8
2
Philips Semiconductors
Product specification
Call progress decoder
NE5900
DC ELECTRICAL CHARACTERISTICS
VCC = +3.3V, TA = 25°C; unless otherwise stated. SYMBOL VDD PARAMETER Power supply voltage Quiescent current Input threshold Signal rejection Low frequency2 rejection High frequency2 rejection VIH VIL IIH IIL VIH VIL VOL VOH IOZ Logic 1 level Logic 0 level Logic 1 input current Logic 0 input current Logic 1 input voltage Logic 0 input voltage Logic 0 output voltage Logic 1 output voltage Tri-state leakage TEST CONDITIONS CONDITIONS Pin 16 Pin 14 = VDD Pin 5, 6 = 0V As above with no output loads Pin 1 level, frequency = 460Hz, VDD = VREF Output Pin 13 = VDD Pin 1 level, frequency = 300Hz, VDD = VREF Output Pin 13 = 0V Pin 1 frequency, 0dB max., VDC = VREF Output Pin 13 = 0V Pin 1 frequency, 0dB max., VDC = VREF Output Pin 13 = 0V Pins 6, 14 Pins 6, 14 Pins 3, 6, 14 = VDD Pins 3, 6, 14 = 0V Pin 3 External Clock In/XTAL Pin 3 External Clock In/XTAL ISINK = 1.6mA Pins 7, 9, 10, 11, 12, 13 ISOURCE = 0.5mA Pins 7, 9, 10, 11, 12, 13 VOUT = VDD or 0V Pins 10, 11, 12, 13, Pin 14 = 0V Input Pin 1, 460Hz 20dB, VDC = VREF Output Pin 15, RLOAD = 1M As above from 300Hz to 630Hz, referenced to 460Hz Pin 1, frequency = 460MHz Pin 2, VDD = 5V Pin 2 Time from removal or application of 460Hz 20dB (VDC = VREF on Pin 1) to response of Pin 13 800 2.0 0 -1.0 -1.0 VDD 1 0 0 VDD 0.4 -3.0 15 0.8 1.0 1.0 VDD 1.0 0.4 VDD 3.0 LIMITS MIN 4.5 TYP 5.0 2.0 -39 MAX 5.5 4.0 -35 -50 180 UNITS V mA dB1 dB1 Hz Hz V V µA µA V V V V µA
Filter output gain Filter frequency response Input impedance VREF RR E F Reference voltage Reference resistance Envelope response time NOTE: 1. 0dB = 0.775VRMS 2. By design; not tested.
6.5 -1.0 1 2.4
8.5
10.5 1.0
dB dBmo M
2.5 5 38
2.6
V ms
The NE5900 uses the signal in the call progress tone passband and the cadence of interrupt rate of the signal to determine which call progress tone is present. Figure 3 shows a detailed block diagram of the NE5900. The signal input from the phone line is coupled through a 470k resistor which, together with two internal capacitors and an internal resistor, form an anti-aliasing filter. This passive low pass filter strongly rejects AM radio interference. Insertion loss is typically 1.5dB at 460Hz. The 470k resistor also provides protection from the transients. The input (Pin 1) DC voltage can be derived from VREF (Pin 2) or allowed to self-bias through a series coupling capacitor (10nF minimum). Following this is a switched capacitor bandpass filter which accepts call progress tones and inhibits tones not in the call progress band of 300Hz to 630Hz. The bandpass limits are determined by the
input clock frequency of 3.58MHz. An on-board inverter between Pins 3 and 4 can be used either as a crystal oscillator or as a buffer for an external 3.58MHz clock signal. The switched capacitor filters provide typical rejection of greater than 40dB for frequencies below 120Hz and above 1.6kHz. The decoder responds to signals between 300Hz and 630Hz with a threshold of -39dB typical (0dB = 0.775VRMS). The decoder will not respond to any signal below -50dB or to tones up to 0dB which are below 180Hz or above 800Hz. Dropouts of 20ms or bursts of only 20ms duration are ignored. A gap of 40ms or a valid tone of 40ms is detected. The buffered output of the switched capacitor filter is available at the analog output, Pin 15. A logic output representing the detected envelope of this signal is available at the envelope output, Pin 13.
1986 May 8
3
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