|
Details, datasheet, quote on part number:NM24C03
| |
Datasheet text preview:
NM24C02/03 2048-Bit Standard 2-Wire Bus Interface Serial EEPROM
February 1999
NM24C02/03 2048-Bit Standard 2-Wire Bus Interface Serial EEPROM
General Description
The NM24C02/03 devices are 2048 bits of CMOS non-volatile electrically erasable memory. These devices conform to all specifications in the I2CTM 2-wire protocol and are designed to minimize device pin count, and simplify PC board layout requirements. The upper half of the memory of the 24C03 can be disabled (Write Protected) by connecting the WP pin to VCC. This section of memory then becomes unalterable unless WP is switched to VSS. This communications protocol uses CLOCK (SCL) and DATA I/O (SDA) lines to synchronously clock data between the master (for example a microprocessor) and the slave EEPROM device(s). In addition, this bus structure allows for a maximum of 16K of EEPROM memory. This is supported by the Fairchild family in 2K, 4K, 8K, and 16K devices, allowing the user to configure the memory as the application requires with any combination of EEPROMs (not to exceed 16K). For devices with densities greater than 16K, a different protocol is used. Refer to 32K or higher densities for additional details. Fairchild EEPROMs are designed and tested for applications requiring high endurance, high reliability and low power consumption.
Features
s Extended operating voltage 2.7V 5.5V s 400 kHz clock frequency (F) at 2.7V - 5.5V s 500µA active current typical 10µA standby current typical 1µA standby typical (L) 0.1µA standby typical (LZ) s I2C compatible interface Provides bidirectional data transfer protocol s Sixteen byte page write mode Minimizes total write time per byte s Self timed write cycle Typical write cycle time of 6ms s Hardware write protect for upper block (NM24C03 only) s Endurance: 1,000,000 data changes s Data retention greater than 40 years s Packages available: 8-pin DIP, 8-pin SO, and 8-pin TSSOP s Available in three temperature ranges - Commercial: 0° to +70°C - Extended (E): -40° to +85C - Automotive (V): -40° to +125°C
Block Diagram
VCC VSS WP H.V. GENERATION TIMING &CONTROL START STOP LOGIC CONTROL LOGIC SLAVE ADDRESS REGISTER & COMPARATOR E2PROM ARRAY
SDA
SCL
XDEC
A2 A1 A0
WORD ADDRESS COUNTER
R/W
YDEC
CK DIN DATA REGISTER DOUT
DOUT ACK
DS500069-1
© 1998 Fairchild Semiconductor Corporation NM24C02/03 Rev.C
1
www.fairchildsemi.com
NM24C02/03 2048-Bit Standard 2-Wire Bus Interface Serial EEPROM
Connection Diagrams
Dual-in-Line Package (N), SO Package (M8), and TSSOP Package (MT8)
A0 A1 A2 VSS 1 2 3 4 8 7 VCC NC SCL SDA
DS500069-2
NM24C02
6 5
Top View See Package Number N08E, M08A, and MTC08
Pin Names
A0,A1,A2 VSS SDA SCL NC VCC Device Address Inputs Ground Serial Data I/O Serial Clock Input No Internal Connection Power Supply
Dual-in-Line Package (N), SO Package (M8), and TSSOP Package (MT8)
A0 A1 A2 VSS 1 2 3 4 8 7 VCC WP SCL SDA
DS500069-3
NM24C03
6 5
Top View See Package Number N08E, M08A, and MTC08
Pin Names
A0,A1,A2 VSS SDA SCL WP VCC Device Address Inputs Ground Serial Data I/O Serial Clock input Write Protect Power Supply
2
NM24C02/03 Rev.C
www.fairchildsemi.com
NM24C02/03 2048-Bit Standard 2-Wire Bus Interface Serial EEPROM
Ordering Information NM 24 C XX F LZ E XX
Package
Letter
N M8 MT8 None V E Blank L LZ
Description
8-pin DIP 8-pin SOIC 8-pin TSSOP 0 to 70°C -40 to +125°C -40 to +85°C 4.5V to 5.5V 2.7V to 5.5V 2.7V to 5.5V and <1µA Standby Current 100KHz 400KHz 2K 2K with write protect CMOS Technology Total Array write protect IIC - 2 Wire Fairchild Non-Volatile Memory
Temp. Range
Voltage Operating Range
SCL Clock Frequency
Blank F 02 03 C W
Density
Interface
24 NM
3
NM24C02/03 Rev.C
www.fairchildsemi.com
|
|
