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Details, datasheet, quote on part number:NM93CS56
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Datasheet text preview:
NM93CS56 (MICROWIRE Bus Interface) 2048-Bit Serial EEPROM with Data Protect and Sequential Read
February 1999
NM93CS56 (MICROWIRETM Bus Interface) 2048-Bit Serial EEPROM with Data Protect and Sequential Read
General Description
The NM93CS56 devices are 2048 bits of CMOS non-volatile electrically erasable memory divided into 128 16-bit registers. Selected registers can be protected against data modification by programming the Protect Register with the address of the first register to be protected against data modification (all registers greater than, or equal to, the selected address are then protected from further change). Additionally, this address can be "locked" into the device, making all future attempts to change data impossible. These devices are fabricated using Fairchild Semiconductor floating-gate CMOS process for high reliability, high endurance and low power consumption. The NM93CS56 is offered in both SO and TSSOP packages for small space considerations. The EEPROM interfacing is MICROWIRE compatible providing simple interfacing to standard microcontrollers and microprocessors. There are a total of 10 instructions, 5 which operate on the EEPROM memory, and 5 which operate on the Protect Register. The memory instructions are READ, WRITE, WRITE ALL, WRITE ENABLE, and WRITE DISABLE. The Protect register instructions a r e PRREAD, PRWRITE, PRENABLE, PRCLEAR, and PRDISABLE.
Features
s Write protection in a user defined section of memory s Sequential register read s Typical active current of 200µA 10µA standby current typical 1µA standby current typical (L) 0.1µA standby current typical (LZ) s No erase required before write s Reliable CMOS floating gate technology s MICROWIRE compatible serial I/O s Self timed write cycle s Device status during programming mode s 40 year data retention s Endurance: 1,000,000 data changes s 2.7V to 5.5V operation in all modes of operation s Packages available: 8-pin SO, 8-pin DIP, 8-pin TSSOP
Functional Diagram
CS SK Instruction Register 6/8 Address Compare amd Write Enable High Voltage Generator And Program Timer VCC Instruction Decoder Control Logic, And Clock Generators PRE PE
DI
Address Register
Protect Register
EN
VPP
Decoder 1 of 16
EEPROM Array 16
Read/Write Amps 16 VSS
Data In/Out Register 16 Bits
DO
Data Out Buffer
DS500085-1
© 1999 Fairchild Semiconductor Corporation NM93CS56 Rev. C.1
1
www.fairchildsemi.com
NM93CS56 (MICROWIRE Bus Interface) 2048-Bit Serial EEPROM with Data Protect and Sequential Read
Connection Diagram
Dual-In-Line Package (N) 8Pin SO (M8) and 8Pin TSSOP (MT8)
CS SK DI DO
1 2 3 4
8 7 6 5
VCC PRE PE GND
DS500085-2
Top View Package Number N08E, M08A and MTC08
Pin Names
CS SK DI DO GND PE PRE VCC Chip Select Serial Data Clock Serial Data Input Serial Data Output Ground Program Enable Protect Register Enable Power Supply
Ordering Information NM 93 CS XX LZ E XX
Package
Letter
N M8 MT8 None V E Blank L LZ 56 C CS Interface 93 NM
Description
8-pin DIP 8-pin SO 8-pin TSSOP 0 to 70°C -40 to +125°C -40 to +85°C 4.5V to 5.5V 2.7V to 5.5V 2.7V to 5.5V and <1µA Standby Current 2048 bits CMOS Data protect and sequential read MICROWIRE - 3 or 4 Wire Interface Fairchild Non-Volatile Memory
Temp. Range
Voltage Operating Range
Density
2
NM93CS56 Rev. C.1
www.fairchildsemi.com
NM93CS56 (MICROWIRE Bus Interface) 2048-Bit Serial EEPROM with Data Protect and Sequential Read
Absolute Maximum Ratings (Note 1)
Ambient Storage Temperature All Input or Output Voltages with Respect to Ground Lead Temperature (Soldering, 10 sec.) ESD rating -65°C to +150°C +6.5V to -0.3V
Operating Conditions
Ambient Operating Temperature NM93CS56 NM93CS56E NM93CS56V Power Supply (VCC) 0°C to +70°C -40°C to +85°C -40°C to +125°C 4.5V to 5.5V
+300°C 2000V
DC and AC Electrical Characteristics VCC = 4.5V to 5.5V unless otherwise specified
Symbol
ICCA ICCS IIL IOL VIL VIH VOL1 VOH1 VOL2 VOH2 fSK tSKH tSKL tSKS
Parameter
Operating Current Standby Current Input Leakage Output Leakage Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage Output Low Voltage Output High Voltage SK Clock Frequency SK High Time SK Low Time SK Setup Time
Part Number
Conditions
CS = VIH, SK=1.0 MHz CS = VIL VIN = 0V to VCC (Note 2)
Min
Max
1 50 ±-1
Units
mA µA µA V V V MHz ns ns ns ns ns ns ns ns ns ns ns ns ns
-0.1 2 IOL = 2.1 mA IOH = -400 µA IOL = 10 µA IOH = -10 µA (Note 3) NM93CS56 NM93CS56E/V 0°C to +70°C -40°C to +125°C SK Must Be at VIL for tSKS before CS goes high (Note 4) 250 300 250 50 50 100 250 100 50 70 50 100 0 250 50 20 2.4
0.8 VCC +1 0.4 0.2
VCC - 0.2 1
tCS tCSS tPRES tDH tPES tDIS tCSH tPEH tPREH tDIH tPD1 tPD0 tSV tDF tWP
Minimum CS Low Time CS Setup Time PRE Setup Time DO Hold Time PE Setup Time DI Setup Time CS Hold Time PE Hold Time PRE Hold Time DI Hold Time Output Delay to "1" Output Delay to "0" CS to Status Valid CS to DO in TRI-STATETM Write Cycle Time
500 500 500 CS = VIL 100 10
ns ns ns ns ms
3
NM93CS56 Rev. C.1
www.fairchildsemi.com
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