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Details, datasheet, quote on part number:PBL38611B
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Datasheet text preview:
Preliminary
October 1997
PBL 386 11/2 Subscriber Line Interface Circuit
Description
The PBL 386 11/2 Subscriber Line Interface Circuit (SLIC) is a 90 V bipolar integrated circuit for use in DAML, FITL and other telecommunications equipment. The PBL 386 11/2 has been optimized for low total line interface cost and a high degree of flexibility in different applications. The PBL 386 11/2 emulates a transformer equivalent dc-feed, programmable between 2x25 and 2x900 , with short loop current limiting adjustable to max 65 mA. A second lower battery voltage may be connected to the device to reduce short loop power dissipation. The SLIC automatically switches between the two battery supply voltages without need for external components or external control. The SLIC incorporates loop current, ground key and ring trip detection functions. The PBL 386 11/2 is compatible with loop start signalling. Two- to four-wire and four- to two-wire voice frequency (vf) signal conversion is accomplished by the SLIC in conjunction with either a conventional CODEC/filter or with a programmable CODEC/filter, e.g. SLAC, SiCoFi, Combo II. The programmable line terminating impedance could be complex or real to fit every market. Longitudinal line voltages are suppressed by a feedback loop in the SLIC and the longitudinal balance specifications meet Bellcore TR909 requirements. The PBL 386 11/2 package is 28-pin PLCC.
Key Features
· Selectable overhead voltage principle All adaptive: The overhead voltage follows 0V < signals < 5Vpk. Semi adaptive: The overhead voltage follows 2.5Vpk < signals < 5Vpk. · Metering 1.6 Vrms · High and low battery with automatic switching · Battery supply as low as -10V · Only +5V in addition to GND and battery (VEE optional) · 35 mW on-hook power dissipation in active state · Long loop battery feed tracks VBat for maximum line voltage · 44V open loop voltage @ -48V battery feed · Constant loop voltage for line leakage <5 mA · On-hook transmission · Full longitudinal current capability during on-hook
Ring Relay Driver
DT 6 7 28 26 25 23 1 RRLY
· Programmable loop & ring-trip detector threshold · Ground key detector · Analog temperature guard · Silent polarity reversal
DR TIPX RINGX HP TS
Ring Trip Comparator Input Decoder and Control
16 C1 15 C2
14 C3 13 VCC 18 DET
Ground Key Detector
5 9 11 12 10 20 21
LP REF PLC PLD SPR AGND VTX RSN
VEE
8
Two-wire Interface
AOV VBAT2 VBAT
3 2 1
Off-hook Detector
BGND
27
VF Signal Transmission
19
Figure 1. Block diagram 28 PLCC.
28-pin plastic PLCC 1
38 PB 61 L 1/ 2
Line Feed Controller and Longitudinal Signal Suppression
4
PSG
PBL 386 11/2
Maximum Ratings
Parameter
Preliminary
Symbol
Min
Max
Unit
Temperature, Humidity Storage temperature range Operating temperature range Operating junction temperature range, Note 1 Power supply, 0°C TAmb +70°C VCC with respect to AGND VEE with respect to AGND VBAT2 with respect to A/BGND VBat with respect to BGND, continuous VBat with respect to BGND, 10 ms Power dissipation Continuous power dissipation at TAmb +70 °C Ground BGND with respect to AGND Relay Driver Ring relay supply voltage Ring relay current Ring trip comparator Input voltage Input current Digital inputs, outputs (C1, C2, C3, DET) Input voltage Output voltage (DET not active) Output current (DET) TIPX and RINGX terminals, 0°C 10 s, Note 1 TIPX or RINGX, pulse 10 s, Note 1 TIP or RING, pulse 10 s, Note 2
TStg T Amb TJ VCC VEE VBat2 VBat VBat PD VG
-55 -40 -40 -0.4 VBat VBat -75 -80
+150 +110 +140 6.5 0.4 0.4 0.4 0.4 1.5
°C °C °C V V V V V W V V
-5
VCC BGND +12 75 mA
VDT, VDR IDT, IDR VID VOD IOD ITIPX, IRINGX VTA, VRA VTA, VRA VTA, VRA VTA, VRA
VBat -5 -0.4 -0.4
VCC 5 VCC VCC 30
V µA V V mA
-100 VBat VBat - 20 VBat - 40 VBat - 70
+100 2 5 10 15
mA V V V V
Recommended Operating Condition
Parameter Symbol Min Max Unit
Ambient temperature VCC with respect to AGND VEE with respect to AGND VBat with respect to BGND
T Amb VCC VEE VBat
0 4.75 VBat -58
+70 5.25 -4.75 -10
°C V V V
Notes
1. The circuit includes thermal protection. Operation above 140°C junction temperature may degrade device reliability.
2
Preliminary
Electrical Characteristics
PBL 386 11/2
0 °C TAmb +70 °C, VCC = +5V ±5 %, VEE = -5V ± 5%, VBat = -58V to -40V, RLC=18.7k, IL = 27 mA, ZL = 600 , RF1, RF2, RP1, RP2=0, RRef = 15k, CHP = 68nF, CLP=0.33 µF, RT = 120 k, RSG = 24 k, RRX = 120 k, AOV-pin not connected, unless otherwise specified. Current definition: current is positive if flowing into a pin.
Ref fig
Parameter
Conditions
Min
Typ
Max
Unit
Two-wire port Overload level, VTRO ,RLDC 2k On-Hook, RLDC 10k Input impedance, ZTR Longitudinal impedance, ZLoT, ZLoR Longitudinal current limit, ILoT, ILoR Longitudinal to metallic balance, BLM 2 Active state 1% THD, Note 1 2.5 1.4 ZT/200 20 35 VPeak VPeak /wire mArms /wire dB dB
Note 2 0 < f < 100 Hz active state 12 IEEE standard 455-1985, ZTRX = 736 0.2 kHz < f < 1.0 kHz 53 1.0 kHz < f < 3.4 kHz 53 3 0.2 kHz f 1.0 kHz 1.0 kHz < f < 3.4 kHz 3 0.2 kHz f 1.0 kHz 1.0 kHz < f < 3.4 kHz 4 0.2 kHz < f < 4.0kHz 59 59 40 53 53
Longitudinal to metallic balance, BLME E BLME = 20 · Log Lo VTR Longitudinal to four-wire balance, BLFE ELo BLFE = 20 · Log VTX Metallic to longitudinal balance, BMLE E BMLE = 20 · Log TR ;ERX = 0 VLo
dB dB
dB dB dB
Figure 2. Overload level, VTRO, two-wire port
1 << R , R = 600 L L C RT = 120 k, RRX = 120 k
RL VTRO
C
TIPX
VTX
ILdc
PBL38611/2
RINGX RSN
RT
E RX
RRX
Figure 3. Longitudinal to metallic (BLME) and Longitudinal to four-wire (BLFE) balance
1 C << 150 , RLR = RLT = RL /2= 300
TIPX ELo C RLT V TR RLR RINGX
VTX
PBL38611/2
RSN
RT
V TX
RRX
RT = 120 k, RRX = 120 k
3
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