64/72-Bit 1 BANK SDRAM Module 64/72-Bit 2 BANK SDRAM Module PC100-168 pin unbuffered DIMM Modules
168 Pin PC100-compatible unbuffered 8 Byte Dual-In-Line SDRAM Modules 1 bank x 72 and 2 bank x 72 organisation Optimized for byte-write non-parity or ECC applications JEDEC standard Synchronous DRAMs (SDRAM) Fully PC board layout compatible to INTEL' s Rev. 1.0 module specification SDRAM Performance:
PC100 fCK tAC Clock frequency (max.) Clock access time CAS latency Units MHz ns
Single 0.3V ) power supply Programmable CAS Latency, Burst Length and Wrap Sequence (Sequential & Interleave) Auto Refresh (CBR) and Self Refresh Decoupling capacitors mounted on substrate All inputs, outputs are LVTTL compatible Serial Presence Detect with E 2PROM Utilizes x 8 SDRAMs in TSOPII-54 packages 4096 refresh cycles every 64 ms Gold contact pad Card Size: 4,00 mm
The HYS64(72)8200 and HYS64(72)16220 are industry standard 168-pin 8-byte Dual in-line Memory Modules (DIMMs) which are organised in 1 bank and x 64 and 72 in two banks high speed memory arrays designed with 64M Synchronous DRAMs (SDRAMs) for non-parity and ECC applications. The DIMMs use -8 speed sort x 8 SDRAM devices in TSOP54 packages to meet the PC100 requirement. Decoupling capacitors are mounted on the PC board. The PC board design is according to INTEL' PC 100 module specification. The DIMMs have a serial presence detect, implemented with a serial E 2PROM using the two pin I2C protocol. The first 128 bytes are utilized by the DIMM manufacturer and the second 128 bytes are available to the end user. All SIEMENS 168-pin DIMMs provide a high performance, flexible 8-byte interface 133,35 mm long footprint, with 1,25"( 31,75 mm) height.
Type HYS 64V8200GU-8 HYS 72V8200GU-8 HYS 64V16220GU-8 HYS 72V16220GU-8 Ordering Code PC100-222-620 Package Descriptions Module Height
L-DIM-168-30 100 Mhz 64 1 bank SDRAM module L-DIM-168-30 100 MHz 72 1 bank SDRAM module L-DIM-168-30 100 Mhz 64 2 bank SDRAM module L-DIM-168-30 100 Mhz 72 2 bank SDRAM module
DQ63 CB0-CB7 RAS CAS - CS3 Vcc Vss SCL SDA N.C. Address Inputs( ~ CA8) Bank Selects Data Input/Output Check Bits (x72 organisation only) Row Address Strobe Column Address Strobe Read / Write Input Clock Enable Clock Input Data Mask Chip Select Power (+3.3 Volt) Ground Clock for Presence Detect Serial Data Out for Presence Detect No Connection
x 72 Part Number HYS 64V8200GU HYS 72V8200GU HYS 64V16220GU HYS 72V16220GU Rows Columns Bank Select Refresh 4k Period 64 ms Interval 15,6 µs
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