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Details, datasheet, quote on part number:PZXPLAMSC
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Datasheet text preview:
INTEGRATED CIRCUITS
PZXPLAPRO Design tools for Philips Semiconductors CoolRunnert CPLDs
Product specification IC27 Data Handbook 1999 Jan 26
Philips Semiconductors
Philips Semiconductors
Product specification
Design tools for Philips Semiconductors CoolRunner CPLDs
PZXPLAPRO
FEATURES
· Design support for all CoolRunnert CPLDs and the
CoolRunner 22V10
SYSTEM REQUIREMENTS
It is recommended that your system have the following as a minimum for using XPLAt Professional:
· Hierarchical design entry, including
Schematic capture Philips Hardware Description Language (PHDL) Verilog HDL VHDL
· Pentium PC running at 100MHz or better · 32 Megabytes of RAM · 30 Megabytes of free disk space · Microsoft Windows 95 or Windows NT 4.0
DESCRIPTION
· Fitter support for EDIF flows from popular third party tools · Graphical simulation environment
Functional simulation AC timing simulation Dynamic current consumption estimation
· Generates VHDL and Verilog device level timing models for board
level simulation
· Graphical signal pin placement editor · Free upgrades and technical support · Full manual and introductory tutorial · Runs on Windowst NT and Windows 95
Philips Semiconductors' XPLA Professional CAE Tool is a Windows based software package used to develop digital designs for the CoolRunner line of Complex Programmable Logic Devices (CPLDs). Hierarchical design entry methods include schematic capture, Philips Hardware Description Language (PHDL), Verilog HDL, and VHDL. Also included is a graphical simulation environment that provides functional simulation, AC timing simulation, and dynamic current consumption estimation. XPLA Professional includes device fitters for all currently released CoolRunner CPLDs, and free upgrades are published on the www.coolpld.com website as new devices are released. The fitter produces a JEDEC file used by industry standard programmers or our own ISP software to configure the targeted device; and also Verilog and VHDL device level timing models which can be used in third party simulators for board level simulation. For more information or for technical support, contact the Philips Semiconductors Programmable Logic Business Line at 1888COOLPLD (15058582996 outside the USA) or through email at coolpld@abq.sc.philips.com.
ORDERING INFORMATION
ORDER CODE PZXPLAPRO MSC DESCRIPTION XPLA Professional Design Tool Package 12NC 935262422112
t Windows is a trademark of Microsoft Corporation
1999 Jan 26
2
8532139 20699
Philips Semiconductors
Product specification
Design tools for Philips Semiconductors CoolRunner CPLDs
PZXPLAPRO
NOTES
1999 Jan 26
3
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