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Details, datasheet, quote on part number:QS74FCT2244ATP
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Datasheet text preview:
QS54/74FCT240T, 244T, 2240T, 2244T
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QUALITY SEMICONDUCTOR, INC.
FEATURES/BENEFITS
High-Speed CMOS 8-Bit Buffers/Line Drivers
DESCRIPTION
QS54/74FCT240T QS54/74FCT244T QS54/74FCT2240T QS54/74FCT2244T
· Pin and function compatible to the 74F240/4 74FCT240/4 and 74ABT240/4 · Industrial temperature 40°C to 85°C · CMOS power levels: <7.5mW static · Available in DIP, SOIC, QSOP, ZIP, HQSOP · Undershoot clamp diodes on all inputs · TTL-compatible input and output levels · Ground bounce controlled outputs · Reduced output swing of 0-3.5V · Military product compliant to MIL-STD-883, Class B FCT-T 240T, 244T · JEDEC-FCT spec compatible · Std. thru D speed grades with 3.8ns tPD for D · IOL = 64mA Ind., 48mA Mil. FCT-T 2240T, 2244T · Built-in 25 series resistor outputs reduce reflection and other system noise · Std. thru C speed grades with 4.1ns tPD for C · IOL = 12mA Ind.
The FCT240T and FCT244T are 8-bit buffers/line drivers with three-state outputs that are ideal for driving high-capacitance loads as in memory address and data buses. The FCT2240T and FCT2244T are 25 resistor output versions useful for driving transmission lines and reducing system noise. The 2240 and 2244 series parts can replace the 240/244 series to reduce noise in an existing design. All inputs have clamp diodes for undershoot noise suppression. All outputs have ground bounce suppression (see QSI Application Note AN-001), and outputs will not load an active bus when VCC is removed from the device.
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Figure 1. Functional Block Diagram
FCT240 FCT2240
No
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1G(1) 1A1(2) 1A2(4) 1A3(6) 1A4(8)
FCT244 FCT2244
1Y1(18) 1Y2(16) 1Y3(14) 1Y4(12)
1G(1) 1A1(2) 1A2(4) 1A3(6) 1A4(8) 1Y1(18) 1Y2(16) 1Y3(14) 1Y4(12)
2G(19) 2A1(11) 2A2(13) 2A3(15) 2A4(17) 2Y1(9) 2Y2(7) 2Y3(5) 2Y4(3)
2G(19) 2A1(11) 2A2(13) 2A3(15) 2A4(17) 2Y1(9) 2Y2(7) 2Y3(5) 2Y4(3)
Note: Pin 19 is 2G on the FCT244.
MDSL-00011-04 DECEMBER 28, 1998
QUALITY SEMICONDUCTOR, INC.
1
QS54/74FCT240T, 244T, 2240T, 2244T Figure 2. Pin Configurations (All Pins Top View)
PDIP, SOIC, QSOP, HQSOP ZIP
1G 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 GND
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
VCC 2G 1Y1 2A4 1Y2 2A3 1Y3 2A2 1Y4 2A1
1G 2Y4 2Y3 2Y2 2Y1 2A1 2A2 2A3 2A4 2G
1 3 5 7 9 11 13 15 17 19
2 4 6 8 10 12 14 16 18 20
1A1 1A2 1A3 1A4 GND 1Y4 1Y3 1Y2 1Y1 VCC
Table 1. Pin Description
Name xA4-xA0 xY4-xY0 1G/2G I/O I O I Description Data Inputs Data Outputs - Three State Output Enables
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Table 2. Function Tables
FCT240/FCT2240
1G/2G H L L Input A X L H Output Y Z H L
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FCT244/FCT2244
1G/2G H L L Input A X L H Output Y Z L H
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QUALITY SEMICONDUCTOR, INC.
MDSL-00011-04 DECEMBER 28, 1998
QS54/74FCT240T, 244T, 2240T, 2244T Table 3. Absolute Maxuimum Ratings
Supply Voltage to Ground ....... 0.5V to 7.0V DC Output Voltage VOUT ......... 0.5V to 7.0V DC Input Voltage VIN ......... 0.5V to 7.0V AC Input Voltage (for a pulse width 20ns) ......... 3.0V DC Input Diode Current with VIN < 0 .......... 20mA DC Output Diode Current with VOUT < 0 ..... 50mA DC Output Current Max. Sink Current/Pin .......... 120mA Maximum Power Dissipation ......... 0.5 watts TSTG Storage Temperature ..... 65° to 150°C
Note: Stresses greater than those listed under ABSOLUTE M A X I M U M RATINGS may cause permanent damage to QSI devices that result in functional or reliability type failures.
Table 4. Capacitance(1)
TA = 25°C, f = 1MHz, VIN = 0V, VOUT = 0V Pins(2) 1, 19 2-9,11-18 SOIC 4 8 QSOP 4 8 PDIP 5 9 ZIP 7 10 Unit pF
Notes: 1. Capacitance is characterized but not tested. 2. Pin reference for 20-pin package.
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pF
Table 5. Power Supply Characteristics
Symbol I CC
No
Parameter
Quiescent Power Supply Current
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Test Conditions(1) VCC = Max., freq = 0 0V VIN 0.2V or VCC-0.2V VIN VCC VCC = Max., VIN = 3.4V, freq = 0(2) VCC = Max., Outputs Open and Enabled One BitToggling @ 50% Duty Cycle Other Inputs at GND or VCC(3,4)
Min -- -- --
Max 1.5 2.0 0.25
Unit mA mA mA/ MHz
ICC QCCD
Supply Current per Input @ TTL HIGH Supply Current per Input per MHz
Notes: 1. For conditions shown as Min. or Max., use the appropriate values specified under DC specifications. 2. Per TTL driven input (VIN = 3.4V). 3. For flip-flops, QCCD is measured by switching one of the data input pins so that the output changes every clock cycle. This is a measurement of device power consumption only and does not include power to drive load capacitance or tester capacitance. This parameter is guaranteed by design but not tested. 4. IC can be computed using the above parameters as explained in the Technical Overview section.
MDSL-00011-04 DECEMBER 28, 1998
QUALITY SEMICONDUCTOR, INC.
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