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Details, datasheet, quote on part number:QS74FCT2245ATQ
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Datasheet text preview:
QS54/74FCT245T, 2245T
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QUALITY SEMICONDUCTOR, INC.
FEATURES/BENEFITS
High-Speed CMOS 8-Bit Tranceivers
DESCRIPTION
QS54/74FCT245T QS54/74FCT2245T
· Pin and function compatible to the 74F245 74FCT245/645 and 74ABT245 · Industrial temperature 40°C to 85°C · CMOS power levels: <7.5mW static · Available in DIP, SOIC, QSOP, ZIP, HQSOP · Undershoot clamp diodes on all inputs · TTL-compatible input and output levels · Ground bounce controlled outputs · Reduced output swing of 0-3.5V · Military product compliant to MIL-STD-883, Class B FCT-T 245T · JEDEC-FCT spec compatible · Std., A, C, and D speed grades; 3.8ns tPD for D · IOL = 64mA Ind., 48mA Mil. FCT-T 2245T · Built-in 25 series resistor outputs reduce reflection and other system noise · Std., A, and C speed grades; 4.1ns tPD for C · IOL = 12mA Ind.
The QSFCT245 and QSFCT2245 are 8-bit noninverting transceivers that have three-state outputs which are useful for bus-oriented applications. The Transmit/Receive (T/R) input determines the direction of data flow, either from A to B or B to A, and the Output Enable (OE) input enables the selected port for output. The FCT2245 is a 25 resistor output version useful for driving transmission lines and reducing system noise. The 2245 parts can replace the 245 series to reduce noise in an existing design. All inputs have clamp diode for undershoot noise suppression. All outputs have ground bounce suppression (see QSI Application Note AN-001), and outputs will not load an active bus when VCC is removed from the device.
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Figure 1. Functional Block Diagram
No
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T/R
Ai
25 25 FCT2245 Only
OE
Bi
MDSL-00012-04 DECEMBER 28, 1998
QUALITY SEMICONDUCTOR, INC.
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QS54/74FCT245T, 2245T Figure 2. Pin Configurations (All Pins Top View)
PDIP, SOIC, QSOP, HQSOP
T/R A0 A1 A2 A3 A4 A5 A6 A7 GND 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCC OE B0 B1 B2 B3 B4 B5 B6 B7
ZIP
T/R A1 A3 A5 A7 B7 B5 B3 B1 OE
1 3 5 7 9 11 13 15 17 19
2 4 6 8 10 12 14 16 18 20
A0 A2 A4 A6 GND B6 B4 B2 B0 VCC
Table 1. Pin Description
Name Ai Bi T/R OE I/O I/O I/O I I Description Data Bus A Data Bus B Direction Output Enable
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Table 2. Function Table
OE H L L T/R X L H A Hi-Z Output Input B Hi-Z Input Output Function Disable Bus B to Bus A Bus A to Bus B
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QUALITY SEMICONDUCTOR, INC.
MDSL-00012-04 DECEMBER 28, 1998
QS54/74FCT245T, 2245T Table 3. Absolute Maximum Ratings
Supply Voltage to Ground ....... 0.5V to 7.0V DC Output Voltage VOUT ......... 0.5V to 7.0V DC Input Voltage VIN ......... 0.5V to 7.0V AC Input Voltage (for a pulse width 20ns) ......... 3.0V DC Input Diode Current with VIN < 0 .......... 20mA DC Output Diode Current with VOUT < 0 .... 50mA DC Output Current Max. Sink Current/Pin .......... 120mA Maximum Power Dissipation .... 0.5 watts TSTG Storage Temperature ..... 65° to 150°C
Note: Stresses greater than those listed under ABSOLUTE M A X I M U M RATINGS may cause permanent damage to QSI devices that result in functional or reliability type failures.
Table 4. Capacitance(1)
TA = 25°C, f = 1MHz, VIN = 0V, VOUT = 0V Pins(2) 1, 19 2-9, 11-18 SOIC 4 8 QSOP 4 8 PDIP 5 9 ZIP 7 10 Unit pF pF
Notes: 1. Capacitance is characterized but not tested. 2. Pin reference for 20-pin package.
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Table 5. Power Supply Characteristics
Symbol I CC
No
Parameter
Quiescent Power Supply Current
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Test Conditions(1) VCC = Max., freq = 0 0V VIN 0.2V or VCC-0.2V VIN VCC VCC = Max., VIN = 3.4V, freq = 0(2) VCC = Max., Outputs Open and Enabled One Bit Toggling @ 50% Duty Cycle Other Inputs at GND or VCC(3,4)
Min -- -- --
Max 1.5 2.0 0.25
Unit mA mA mA/ MHz
ICC QCCD
Supply Current per Input @ TTL HIGH Supply Current per Input per MHz
Notes: 1. For conditions shown as Min. or Max., use the appropriate values specified under DC specifications. 2. Per TTL driven input (VIN = 3.4V). 3. For flip-flops, QCCD is measured by switching one of the data input pins so that the output changes every clock cycle. This is a measurement of device power consumption only and does not include power to drive load capacitance or tester capacitance. This parameter is guaranteed by design but not tested. 4. IC can be computed using the above parameters as explained in the Technical Overview section.
MDSL-00012-04 DECEMBER 28, 1998
QUALITY SEMICONDUCTOR, INC.
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