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Details, datasheet, quote on part number:SAA2520GP
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Datasheet text preview:
INTEGRATED CIRCUITS
DATA SHEET
SAA2520 Stereo filter and codec for MPEG layer 1 audio applications
Preliminary specification File under Integrated Circuits, IC01 August 1993
Philips Semiconductors
Preliminary specification
Stereo filter and codec for MPEG layer 1 audio applications
FEATURES · Stereo filtering and codec functions in a single chip · MPEG coded interface · Filtered data interface · Baseband audio data interface · LT interface to microcontroller · Clock generator · Low operating voltage capability. ORDERING INFORMATION EXTENDED TYPE NUMBER SAA2520GP(1) Note 1. SOT205-1; 1996 August 26. PACKAGE PINS 44 PIN POSITION QFP MATERIAL plastic GENERAL DESCRIPTION
SAA2520
The SAA2520 performs the sub-band filtering and audio frame codec functions to provide efficient audio compression/decompression for MPEG (11172-3) Layer1 applications. It is capable of functioning as a stand-alone decoder but requires the addition of an adaptive masking threshold processor (SAA2521) in order to function as a highly efficient encoder.
CODE SOT205AG
CLK24
handbook, full pagewidth CLK22
X22OUT
X24OUT V DD 43 28,44 8 SBDA SBCL SBWS SBMCLK
X22IN 39 40
X24IN 41 42
38 1
FS256
CLOCK GENERATOR
SAA2520
SBDIR SBEF
7 11
SUB-BAND SERIAL INTERFACE
9 10 12
STEREO SUB-BAND FILTER PROCESSOR
2 CODEC 3 4
MUTEDAC DEEMDAC ATTDAC
SWS SCL SDA
20 19 21 BASEBAND SERIAL INTERFACE FILTERED DATA INTERFACE MICROPROCESSOR INTERFACE & CONTROL
5,37 V SS
18
17
16
15 FRESET
14
13
36
35
34
33
32
22
29
6
MLB125
FDAF FDAC
SYNCDAI
LTCNT0
LTCLK LTENA
PWRDWN
URDA
FSYNC
FDIR
LTCNT1
LTDATA
RESET
Fig.1 Block diagram.
August 1993
2
Philips Semiconductors
Preliminary specification
Stereo filter and codec for MPEG layer 1 audio applications
SAA2520
43 X24OUT
41 X22OUT
35 LTCNT0
36 LTCNT1
handbook, full pagewidth
FS256 MUTEDAC DEEMDAC ATTDAC V SS URDA SBDIR SBDA SBCL
34 LTENA
39 CLK24
38 CLK22
42 X24IN
40 X22IN
44 VDD
37 V SS
1 2 3 4 5 6 7 8 9
33 LTCLK 32 LTDATA 31 T0 30 T1 29 RESET
SAA2520
28 VDD 27 DSC0 26 DSC1 25 DSC2 24 DSC3 23 DSC4
SBWS 10 SBEF 11
12
SYNCDAI 13
14
15
FSYNC 16
17
18
19
20
21
22
MLB126
SBMCLK
SWS
SDA
Fig.2 Pin configuration.
handbook, full pagewidth
AUDIO AMPLIFIER
digital audio interface DAC control SAA2520 system micro interface MICROCONTROLLER power down reset
MLB127
MPEG interface
PWRDWN
FDIR
FDAC
FRESET
FDAF
SCL
MPEG source
Fig.3 MPEG decoder system data flow diagram.
August 1993
3
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