Details, datasheet, quote on part number: STLC7546
PartSTLC7546
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Description
CompanyN.A.
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Features, Applications

GENERAL-PURPOSE SIGNAL PROCESSING ANALOG FRONT END (AFE) TARGETED FOR V.34bis MODEM AND BUSINESS AUDIO APPLICATIONS 16-BIT OVERSAMPLING A/D AND D/A CONVERTERS 89dB SIGNAL-TO-(NOISE+DISTORTION) RATIO FOR SAMPLING FREQUENCY (FS) @5V 94dB DYNAMIC RANGE @5V MAX SAMPLING FREQUENCY : 45kHz PROGRAMMABLE ADC AND DAC OVERSAMPLING FREQUENCIES. OVERSAMPLING FREQUENCY 32 x FS, N THE OVERSAMPLING FREQUENCY CAN BE FROM TO 2.88MHz MAX. SAMPLING FREQUENCY : 22.5kHz FILTER BANDWIDTHS 0.425 x THE SAMPLING FREQUENCY ON-CHIP REFERENCE VOLTAGE DIFFERENTIAL OUTPUT WITH PROGRAMMABLE ATTENUATION 0dB,6dB OR INFINITE TWO SETS OF DIFFERENTIAL INPUTS WITH PROGRAMMABLE GAINS OF 0dB AND 6dB 16-BIT SYNCHRONOUS SERIAL INTERFACE WHOSE OPERATION IS EITHER HARDWARE OR SOFTWARE CONTROLLABLE SINGLE POWER SUPPLYRANGE 5% OR DOUBLE POWER SUPPLY 5V 5% DIGITALPART 5.0V 5% ANALOGPART LOW POWER CONSUMPTION : 100mW OPERATING POWER AT THE NOMINAL FREQUENCY OF 1.536MHz AND 5.0V SINGLE SUPPLY @ 3.3V). LESS THAN 50W IN THE LOW POWER MODE WHEN THE MCLK NOT RUNNING 0.8m CMOS PROCESS TQFP44 AND PLCC28 PACKAGES

This device has a 16-bit oversampling ADC and DAC, filters and control logic for the serial interface. The oversampling frequencies for the ADC and DAC are user programmable. The device operation is controlled by reading the 16-bit information control register. The major functions of the STLC7546 are - To convert the audio-signal 16-bit 2's complement data format through the ADC channel. - To communicate with an external digital signal processor via serial interface logic. - To convert 16-bit 2's complement data from a digital signal processorto an audio signal through the DAC channel. The STLC7546 consists of two signal-processing channels, an ADC channel and a DAC channel, and the associated digital control. The two channels operate synchronously so that the transmitted data to the DAC channel and received data from the ADC channel occur during the same time interval. The data transfer in 2s complement format. To save power, e.g. in lap-top modem applications, the low-power reset mode can be used to reduce the power consumption to less than 1mW.

PLCC28 (Plastic Leaded Chip Carrier Package) ORDER CODE : STLC7546CFN

DESCRIPTION The is a high-resolution analog-to-digital and digital-to-analog converter targeted for V.34bis modem and consumer audio applications.

November x 1.4mm) (Thin Plastic Quad Flat Package) ORDER CODE : STLC7546TQFP4Y

Name SCLK FS DVDD DGND VC1 VC2 MCLK HC1 HC0 PWRDWN TSTA VREFP VREFN AGNDR AUX IN+ AUX ININ+ INAVDD V CM AGNDT OUT+ OUTRESET D IN DOUT Pin Number PLCC28 TQFP44 Shift Clock Output Frame Synchronization Output Positive Digital Power Supply to 5.25V) Digital Ground (0V) Voltage Control (should be tied to ground) Voltage Control (should be tied to ground) Master Clock Input (equal to the ADC and DAC oversampling frequency) Hardware Control Input Hardware Control Input Power-down Input Analog Output Reserved for Test 16-bit DAC and ADC Positive Reference Voltage 16-bit DAC and ADC Negative Reference Voltage Analog Ground (0V) NonInverting Input to Auxiliary Analog Input Inverting Input to Auxiliary Analog Input NonInverting Input to Analog Input Amplifier Inverting Input to Analog Input Amplifier Positive Analog Power Supply (5V 5%) Common Mode Voltage Output (AVDD/2 5%) Analog Ground (0V) Noninverting Smoothing Filter Output Inverting Smoothing Filter Output Reset Function to Initialize the Internal Counters Digital Input Reserved for Test Digital Output Reserved for Test Serial Data Input Serial Data Output

Description

 

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