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Details, datasheet, quote on part number:UPD72123GJ-5BG
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Datasheet text preview:
********** C-MOS ADVANCED GRAPHIC DISPLAY CONTROLLER
-TOP VIEW-
I UPD72123GJ-5BG (1/4) L00
(+ DDG 5V)
GND GND
ND
94 93 92 91 80 89 88 87 86 85 84 83 82 81 70 79 78 77 76 75 74 73 72 1
2 1 3 4 5 6 7 8 9 1 10 11 12 13 14 15 16 17 18 29 20 21 22 3
V GND V
(+ VDDG 5V) GND
GDD (+5V)
ND
GND ND
24 25 26 27 28 39 30 31 32 33 34 35 36 37 38 49 40 41 42 43 44 45 46 7
GND V ND
G
DD (+5V)
6 70 69 68 67 66 65 64 63 62 61 50 59 58 57 56 55 54 53 52 51 40 49 8
UPD72123GJ-5BG (2/4) (VDD = +5V) PIN N o. 2 1 3 4 5 6 7 8 9 1 10 11 12 13 14 15 16 17 18 29 20 21 22 23 4 I/O I-- I/O I/O I/O I/O I/O I/O -- /O -- I I I I I I -- -- I I I/O I/O -- /O I /O SIGNAL M ND G M D12 A M AD5 M D13 A M AD6 M D14 A M AD7 V D15 A G DD M ND MA16 MA17 MA18 A A19 U TB S IBE IC C C DK DAD0 DAD1 AD2 I DC AD3 PIN N o. 25 26 27 28 39 30 31 32 33 34 35 36 37 38 49 40 41 42 43 44 45 46 47 8 I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O -- /O -- -- -- -- O O O O O O I SIGNAL DAD4 DAD5 DAD6 DAD7 DAD8 D AD9 DAD10 DAD11 DAD12 DAD13 DAD14 AD15 I IC GC GND VND D DD DA16 DA17 DA18 DA19 DA20 D A21 WAIT PIN N o. 5 49 50 51 52 53 54 55 56 57 58 69 60 61 62 63 64 65 66 67 68 79 70 71 2 I/O O O O -- -- O O O O O I -- O O I I/O O /O I -- -- -- O O SIGNAL DA22 D A23 DUBE G BE L GND WND D AIT D STB A D RD H WR H LDAK LI RO D DC B /DISP T H LANK VS/EXHS G S/EXVS CS R/IHS S ICK GC VND D DD D PBSY MARO PIN N o. 73 74 75 76 77 78 89 80 81 82 83 84 85 86 87 88 99 90 91 92 93 4 I/O O I O I -- -- I I I I -- -- -- I I/O I/O I/O I/O I/O I/O I/O I/O /O SIGNAL DMAAK I R NT READY ESET I GC C ND C SIR SDM R WD GR GND VND M DD MAD0 MAD8 MAD1 MAD9 M AD2 M D10 A M AD3 M D11 A AD4
UPD72123GJ-5BG (3/4)
6 8 4 2 9 93 81 89 7 5 3 9 94 92 80 88 16 14 13 12 71 36 35 34 33 32 31 20 29 28 27 26 25 24 22 21 50 40 49 47 46 45 44 43 52 75 72 74 65 63 64 55 41 52 59 58 57 66 62 76 1
MAD15 MAD14 MAD13 MAD12 MAD11 MAD10 MAD9 MAD8 MAD7 MAD6 MAD5 MAD4 MAD3 MAD2 MAD1 MAD0 MA19 MA18 MA17 D A16
DAD15 DAD14 DAD13 DAD12 DAD11 D D10 A DAD9 DAD8 DAD7 DAD6 DAD5 DAD4 DAD3 DAD2 DAD1 DAD0 DA23 DA22 DA21 DA20 DA19 DA18 DA17 W 16 A
A INPUT CSTB CK CSDM DSIR DMAAK HWAIT MLDRQ R A19-16 RESET SD UCK WE B OR B UTPUT DLANK DA23-16 DASTB DLBE DMARQ DPBSY DRD DT/DISP DUBE GWR H CSR/IHS I LDAK RT N W ADY E I AIT
; ; ; ; ; ; ; ; ; ADDRESS STROBE CLOCK CHIP SELECT DISPLAY MEMORY CHIP SELECT INTERNAL REGISTER DMA ACKNOWLEDGE DRAWING WAIT HOLD REQUEST MAIN ADDRESS RESET (PARAMETER REGISTER NO CLEAR) READ ; SYNC CLOCK ; UPPER BYTE ENABLE ; WRITE ; DISPLAY ERASE CONTROL DISPLAY ADDRESS DISPLAY ADDRESS STROBE DISPLAY LOWER BYTE ENABLE DMA REQUEST DRAWING PROCESSOR BUSY DISPLAY READ DATA TRANSFER/DISPLAY DISPLAY UPPER BYTE ENABLE DISPLAY WRITE GRAPHIC CURSOR/ INTERNAL HORIZONTAL SYNC HOLD ACKNOWLEDGE INTERRUPT RD/WR ACCESS WITH LOW OUTPUT GDC WAIT CONTROL
; ; ; ; ; ; ; ; ; ; ; ; ; ; ;
73 89 80 81 12 15 66
CMAAK CSIR RSDM W D AR USTB HBE
D
AIT MAIRQ
R
NT
BEADY H LANK
VS/EXHS S/D XVS E DUBE
D PUT/OUTPUT N HAD15-0 MS/EXHS ; V AD15-0 ; S/EXVS ;
DISPLAY/ADDRESS/DATA BUS H SYNC/EXTERNAL H SYNC MAIN ADDRESS/DATA BUS V SYNC/EXTERNAL V SYNC
10
LDRQ
H LBE LDAK D
· PREDFINE DATA ACCESS DATA BUS OF DIMENSION MEMORY 0 DLBE DUBE DATA ACCESS FORMAT 0 EVEN ADDRESS WORD 1 0 EVEN ADDRESS BYTE 0 1 ODD ADDRESS BYTE 1 0 ; LOW LEVEL ; HIGH LEVEL
69 77
CK SCK R DESET D
DR W RD
46
D ASTB G T/DISP CDR/IHS S WAIT PBSY
8
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