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Details, datasheet, quote on part number:VP553
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Datasheet text preview:
Ordering number : EN5350A
Wideband Output Module (Video Pack)
VP553
CRT Display Video Output Amplifier
Features
· Active load circuits · Wide bandwidth and high output voltage. Optimal for use in fH (horizontal deflection frequency) = 90 kHz class ultrahigh precision monitors. · S i n g l e 15-pin SIP molded package houses three channels.
Package Dimensions
unit: mm
2127A
[VP553]
Specifications
Absolute Maximum Ratings at Ta = 25°C
Parameter Maximum supply voltage Allowable power dissipation Maximum junction temperature Maximum case temperature Storage temperature Symbol VCC max Pd max Tj max Tc max Tstg With an ideal heat sink at Ta = 25°C Conditions Ratings 90 25 150 100 20 to +110 Unit V W °C °C °C
Operating Conditions at Ta = 25°C
Parameter Recommended supply voltage Symbol VCC Conditions Ratings 80 Unit V
Electrical Characteristics at Ta = 25°C (For a single channel, with Rin = 680 , Rip = 22 , Cip = 56 pF)
Parameter Clock frequency bandwidth (3 dB) Frequency bandwidth (3 dB) Pulse response Voltage gain Symbol f (clock) fc tr tf VG (DC) ICC(1) Current drain ICC(2) VCC = 80 V, VIN (DC) = 2.0 V, f = 10 MHz clock, CL = 10 pF, VOUT (p-p) = 40 V VCC = 80 V, VIN (DC) = 2.0 V, f = 100 MHz clock, CL = 10 pF, VOUT (p-p) = 40 V Conditions VCC = 80 V, CL = 10 pF VIN (DC) = 2.0 V, VOUT (p-p) = 40 V VCC = 80 V, CL = 10 pF VIN (DC) = 2.0 V, VOUT (p-p) = 40 V 13 Ratings min typ 160 80 4.8 4.5 15 32 75 17 max Unit MHz MHz ns ns Double mA mA
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
13097HA (OT) No. 5350-1/5
VP553 Internal Equivalent Circuit
Test Circuit (for a single channel)
No. 5350-2/5
VP553
Thermal Design Thermal design requires that the two conditions Tj (max) 150°C and Tc 100°C be met. (a) Concerning Tj (max), the chip temperature Tj for each transistor is given by equation (1). Tj = (Tri) = jc (Tri) × PC (Tri) + Tc + Ta (°C) ......(1) jc (Tri): The thermal resistance of each transistor chip itself PC (Tri): The collector loss for each transistor Tc: Increase in the case temperature Ta: Ambient temperature jc (Tri) for each chip will be: jc (Tr1) to (Tr4) = 35°C/W ........(2) The loss in transistors in a video pack varies with frequency. The loss increases with the frequency. For example, if the maximum frequency will be 100 MHz (clock), then the transistors with the largest losses will be transistors 3 and 4 in the emitter-follower (EF) stage. From the Pd f (clock) figure, we see that that loss will be 25% of the total for a single channel. That is: PC (EF stage) f = 100 MHz = Pd (1ch) f = 100 MHz × 0.25 [W]..........(3) The thermal design must assure that Tj does not exceed 150°C at this time. (b) Concerning Tc (max), the relationship between h and Tc is: Tc = Pd (total) × h ............(4) Taking the increase due to Ta into account, the condition the thermal design must meet becomes Tc = Tc + Ta < 100°C. Next we design thermal conditions for the VP553 that meet the conditions in sections (a) and (b) above.
No. 5350-3/5
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