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Part: ALD1103PB
Category:
Description: Dual N-channel Matched MOSFET Pair
Company: Advanced Linear Devices
Datasheet: Download ALD1103PB datasheet File size : 906 kB
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ADVANCED LINEAR DEVICES, INC.
ALD1103
DUAL N-CHANNEL AND DUAL P-CHANNEL MATCHED MOSFET PAIR
GENERAL DESCRIPTION The ALD1103 is a monolithic dual N-channel and dual P-channel matched transistor pair intended for a broad range of analog applications. These enhancement-mode transistors are manufactured with Advanced Linear Devices' enhanced ACMOS silicon gate CMOS process. It consists of an ALD1101 N-channel MOSFET pair and an ALD1102 P-channel MOSFET pair in one package. The ALD1103 offers high input impedance and negative current temperature coefficient. The transistor pair is matched for minimum offset voltage and differential thermal response, and it is designed for precision signal switching and amplifying applications in +2V to +12V systems where low input bias current, low input capacitance and fast switching speed are desired. Since these are MOSFET devices, they feature very large (almost infinite) current gain in a low frequency, or near DC, operating environment. When used in pairs, a dual CMOS analog switch can be constructed. In addition, the ALD1103 is intended as a building block for differential amplifier input stages, transmission gates, and multiplexer applications. The ALD1103 is suitable for use in precision applications which require very high current gain, beta, such as current mirrors and current sources. The high input impedance and the high DC current gain of the Field Effect Transistors result in extremely low current loss through the control gate. The DC current gain is limited by the gate input leakage current, which is specified at 50pA at room temperature. For example, DC beta of the device at a drain current of 5mA at 25°C is = 5mA/50pA = 100,000,000. FEATURES · Thermal tracking between N-channel and P-channel pairs · Low threshold voltage of 0.7V for both N-channel & P-channel MOSFETS · Low input capacitance · Low Vos -- 10mV · High input impedance -- 1013 typical · Low input and output leakage currents · Negative current (IDS) temperature coefficient · Enhancement mode (normally off) · DC current gain 109 · Matched N-channel and matched P-channel in one package
APPLICATIONS · · · · · · · · · · Precision current mirrors Complementary push-pull linear drives Analog switches Choppers Differential amplifier input stage Voltage comparator Data converters Sample and Hold Analog inverter Precision matched current sources
PIN CONFIGURATION
DN1 GN1 SN1 VDP1 GP1 SP1 1 2 3 4 5 6 7 DB, PB, SB PACKAGE 14 13 12 11 10 9 8 DN2 GN2 SN2 V+ DP2 GP2 SP2
BLOCK DIAGRAM
N GATE 1 (2)
N DRAIN 1 (1)
N SOURCE 1 (3) SUBSTRATE (4)
N DRAIN 2 (14)
N SOURCE 2 (12)
N GATE 2 (13)
ORDERING INFORMATION
-55°C to +125°C 14-Pin CERDIP Package ALD1103 DB Operating Temperature Range* 0°C to +70°C 0°C to +70°C 14-Pin Plastic Dip Package ALD1103 PB 14-Pin SOIC Package ALD1103 SB
P GATE 1 (6)
P DRAIN 1 (5)
P SOURCE 1 (7) SUBSTRATE (11)
P DRAIN 2 (10)
P SOURCE 2 (8)
* Contact factory for industrial temperature range.
P GATE 2 (9)
© 1998 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, California 94089 -1706 Tel: (408) 747-1155 Fax: (408) 747-1286 http://www.aldinc.com
ABSOLUTE MAXIMUM RATINGS
Drain-source voltage, VDS Gate-source voltage, VGS Power dissipation Operating temperature range Storage temperature range Lead temperature, 10 seconds 13.2V 13.2V 500 mW 0°C to +70°C -55°C to +125°C -65°C to +150°C +260°C
PB, SB package DB package
OPERATING ELECTRICAL CHARACTERISTICS T A = 25°C unless otherwise specified
N - Channel Parameter Symbol Min Typ Max Gate Threshold VT 0.4 0.7 1.0 Voltage Offset Voltage VGS1 - VGS2 VOS 10 Unit V Test Conditions IDS = 10µA VGS = VDS IDS = 100µA VGS = VDS P - Channel Min Typ Max -0.4 -0.7 -1.2 Unit V Test Conditions IDS = -10µA VGS = V DS IDS = -100µA VGS = V DS
mV
10
mV
Gate Threshold Temperature TCVT Drift On Drain Current Trans-. conductance Mismatch Output Conductance Drain Source ON Resistance IDS (ON) G fs G fs G OS R DS(ON) 25
-1.2
mV/°C
-1.3
mV/°C
40
mA
VGS = V DS = 5V VDS = 5V IDS= 10mA
-8
-16
mA
VGS = VDS = -5V VDS = -5V IDS= -10mA
5
10
mmho
2
4
mmho
0.5 200
% µ mho VDS = 5V IDS = 10mA VDS = 0.1V VGS = 5V
0.5 500
% µmho VDS = -5V IDS = -10mA VDS = -0.1V VGS = -5V
50
75
180
270
Drain Source ON Resistance RDS(ON) Mismatch Drain Source Breakdown Voltage Off Drain Current Gate Leakage Current Input Capacitance
0.5
%
VDS = 0.1V VGS = 5V
0.5
%
VDS = -0.1V VGS = -5V
BVDSS IDS(OFF) IGSS C ISS
12
V
IDS = 10µA VGS =0V VDS =12V IGS = 0V TA = 125°C VDS = 0V VGS =12V TA = 125°C
-12
V
IDS = -10µA VGS =0V VDS = -12V VGS = 0V TA = 125°C VDS = 0V VGS =-12V TA = 125°C
0.1
4 4 50 10 10
nA µA pA nA pF
0.1
4 4 50 10 10
nA µA pA nA pF
1
1
6
6
ALD1103
Advanced Linear Devices
2
P- CHANNEL TYPICAL PERFORMANCE CHARACTERISTICS
OUTPUT CHARACTERISTICS
LOW VOLTAGE OUTPUT CHARACTERISTICS
DRAIN-SOURCE CURRENT (mA) VBS = 0V TA = 25°C 2 VGS = -12V -6V -4V -2V 0
DRAIN - SOURCE CURRENT (mA)
-80 -60 VBS = 0V TA = 25°C
VGS = -12V -10V -8V -6V
-40
-20
-2
-4V -2V
0 0 -2 -4 -6 -8 -10 -12 DRAIN - SOURCE VOLTAGE (V)
4 4 - -320
-160
0
160
320
DRAIN -SOURCE VOLTAGE (mV)
FORWARD TRANSCONDUCTANCE vs. DRAIN - SOURCE VOLTAGE
FORWARD TRANSCONDUCTANCE (µmho)
10000 5000 2000 1000 500 200 100 0 -2 -4 -6 -8 -10 -12 TA = +25°C IDS = -1mA TA = +125°C
-20
TRANSFER CHARACTERISTIC WITH SUBSTRATE BIAS
DRAIN-SOURCE CURRENT (µA)
VBS = 0V -15 2V 4V 6V 8V 10V 12V
VBS = 0V f = 1KHz
IDS = -5mA
-10
-5 VGS = VDS TA = 25°C 0 0 -0.8 -1.6 -2.4 -3.2 -4.0
DRAIN - SOURCE VOLTAGE (V)
GATE - SOURCE VOLTAGE (V)
RDS (ON) vs. GATE - SOURCE VOLTAGE
DRAIN - SOURCE ON RESISTANCE () OFF - DRAIN SOURCE CURRENT (A)
10000 VDS = 0.4V VBS = 0V 1000 TA = +125°C
-10X10-6
OFF DRAIN - CURRENT vs. TEMPERATURE
VDS = -12V VGS = VBS = 0V
-10X10-9
100 TA = +25°C 10 0 -2 -4 -6 -8 -10 -12
-10X10-12 -50 -25 0 +25 +50 +75 +100 +125
GATE - SOURCE VOLTAGE (V)
TEMPERATURE (°C)
ALD1103
Advanced Linear Devices
3
N- CHANNEL TYPICAL PERFORMANCE CHARACTERISTICS
OUTPUT CHARACTERISTICS
8
DRAIN -SOURCE CURRENT (mA)
LOW VOLTAGE OUTPUT CHARACTERISTICS
DRAIN-SOURCE CURRENT (mA)
VBS = 0V TA = 25°C 4 VGS = 12V 6V 4V 2V 0
160
VBS = 0V TA = 25°C
VGS = 12V 10V 8V
120
80
6V 4V 2V
40
-4
0 0 2 4 6 8 10 12 DRAIN-SOURCE VOLTAGE (V)
-8 -160
-80
0
80
160
DRAIN -SOURCE VOLTAGE (mV)
FORWARD TRANSCONDUCTANCE (µmho)
1 x105 5 x104 2 x104
FORWARD TRANSCONDUCTANCE vs. DRAIN-SOURCE VOLTAGE
20
TRANSFER CHARACTERISTIC WITH SUBSTRATE BIAS
DRAIN-SOURCE CURRENT (µA)
VGS = VDS TA = 25°C 15 VBS = 0V 10 -2V -4V -6V -8V -10V 5 -12V
VBS = 0V f = 1KHz TA = +125°C TA = +25°C
IDS = 10mA
1 x104 5 x103 2 x103 1 x103 0 2 4 IDS = 1mA 6 8 10 12
0 0 0.8 1.6 2.4 3.2 4.0
DRAIN -SOURCE VOLTAGE (V)
GATE - SOURCE VOLTAGE (V)
RDS (ON) vs. GATE - SOURCE VOLTAGE
DRAIN - SOURCE ON RESISTANCE ()
OFF - DRAIN SOURCE CURRENT (A)
10000 VDS = 0.2V VBS = 0V 1000 TA = +125°C 100
10X10-6
OFF DRAIN - CURRENT vs. TEMPERATURE
VDS = +12V VGS = VBS = 0V
10X10-9
10 0
TA = +25°C 2 4 6 8 10 12
10X10-12 -50 -25 0 +25 +50 +75 +100 +125
GATE SOURCE VOLTAGE (V)
TEMPERATURE (°C)
ALD1103
Advanced Linear Devices
4
TYPICAL APPLICATIONS
CURRENT SOURCE MIRROR
V+ = +5V
CURRENT SOURCE WITH GATE CONTROL
V+ = +5V 1/2 ALD1103
V+ = +5V Q3 Q4
Q3
Q4
ISET
RSET
ISET
I SOURCE
RSET
ISOURCE
Digital Logic Control of Current Source ON Q1 1/4 ALD1103 OFF : N - Channel MOSFET Q1 Q3,Q4 : P - Channel MOSFET
Q1
Q2
ALD1103 Q1, Q2: N - Channel MOSFET Q3, Q4: P - Channel MOSFET
I SOURCE = ISET = V+ -Vt RSET ~ = 4 RSET
DIFFERENTIAL AMPLIFIER
V+
CURRENT SOURCE MULTIPLICATION
V+ = +5V
PMOS PAIR Q3 Q4 VOUT
ISET
RSET ISOURCE = ISET x N
VIN+
Q1
Q2 NMOS PAIR
QSET
Q1
Q2
Q3
QN
VIN-
ALD1103
Current Source
Q1, Q2: N - Channel MOSFET Q3, Q4: P - Channel MOSFET
QSET, Q1..QN: ALD 1101 or ALD 1103 N - Channel MOSFET
ALD1103
Advanced Linear Devices
5
Others parts begin by al
AL-1 AL-2 AL-3 AL-4
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