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Part: AM28F010-120JEB
Category:
Description: 1 Megabit CMOS 12.0 Volt, Bulk Erase Flash Memory
Company: Advanced Micro Devices, Inc.
Datasheet: Download AM28F010-120JEB datasheet File size : 427 kB
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Datasheet text preview:
FINAL
Am28F010
1 Megabit (128 K x 8-Bit) CMOS 12.0 Volt, Bulk Erase Flash Memory
DISTINCTIVE CHARACTERISTICS
s High performance -- 70 ns maximum access time s CMOS Low power consumption -- 30 mA maximum active current -- 100 µA maximum standby current -- No data retention power consumption s Compatible with JEDEC-standard byte-wide 32-Pin EPROM pinouts -- 32-pin PDIP -- 32-pin PLCC -- 32-pin TSOP s 10,000 write/erase cycles minimum s Write and erase voltage 12.0 V ±5% s Latch-up protected to 100 mA from 1 V to V CC +1 V s FlasheraseTM Electrical Bulk Chip-Erase -- One second typical chip-erase s FlashriteTM Programming -- 10 µs typical byte-program -- Two seconds typical chip program s Comm and register architecture for micro processo r/microcontroller compatible write interface s On -chip address and data latches s Advanced CMOS flash memory technology -- Low cost single transistor memory cell s Autom atic write/erase pulse stop timer
GENERAL DESCRIPTION
Th e Am28F010 is a 1 Megabit Flash memory organ i z e d as 128 Kbytes of 8 bits each. AMD's Flash me m o r i e s offer the most cost-effective and reliable re ad / writ e non-volatile random access memory. The Am 2 8F 01 0 is packaged in 32-pin PDIP, PLCC, and T SOP versions. It is designed to be reprogrammed a n d erased in-system or in standard EPROM progra m m ers. The Am28F010 is erased when shipped fro m the factory. The standard Am28F010 offers access times as fast as 70 ns, allowing operation of high-speed microprocessors without wait states. To eliminate bus contention, th e Am28F010 has separate chip enable (CE#) and output enable (OE#) controls. AMD's Flash memories augment EPROM functionality with in-circuit electrical erasure and programming. The Am2 8F01 0 uses a command register to manage this func tion ality, while maintaining a JEDEC Flash Standard 32-pin pinout. The command register allows for 100% TTL level control inputs and fixed power supply levels during erase and programming, while maintaining maximum EPROM compatibility. AMD's Flash technology reliably stores memory contents even after 10,000 erase and program cycles. The AM D cell is designed to optimize the erase and programming mechanisms. In addition, the combination of a d va n c e d tunnel oxide processing and low internal ele ctr ic fields for erase and programming operations p r o d u c e s reliable cycling. The Am28F010 uses a 1 2 . 0 V ± 5 % V P P high voltage input to perform the Flasherase and Flashrite algorithms. The highest degree of latch-up protection is achieved with AMD's proprietary non-epi process. Latch-up protection is provided for stresses up to 100 milliamps on address and data pins from 1 V to V CC +1 V. The Am28F010 is byte programmable using 10 ms programming pulses in accordance with AMD's Flashrite programming algorithm. The typical room temperature pro gram ming time of the Am28F010 is two seconds. The entire chip is bulk erased using 10 ms erase pulses according to AMD's Flasherase alrogithm. Typical erasure at room temperature is accomplished in less than on e second. The windowed package and the 1520
P ublicatio n# 11559 Rev: I Issue Date: May 12, 1999
A men dme nt/0
minutes required for EPROM erasure using ultra-violet light are eliminated. Co mma nd s are written to the command register using stan dard microprocessor write timings. Register cont e n ts serve as inputs to an internal state-machine whi ch controls the erase and programming circuitry. Duri ng write cycles, the command register internally latc hes address and data needed for the programming an d erase operations. For system design simplification , the Am28F010 is designed to support either WE# or CE# controlled writes. During a system write cycle, add re sses are latched on the falling edge of WE# or CE# whichever occurs last. Data is latched on the ris-
in g edge of WE# or CE# whichever occurs first. To simp lify the following discussion, the WE# pin is used as the write cycle control pin throughout the rest of this text. All setup and hold times are with respect to the WE# signal. AM D's Flash technology combines years of EPROM and EEPROM experience to produce the highest levels o f quality, reliability, and cost effectiveness. The Am 28 F0 10 electrically erases all bits simultaneously using Fowler-Nordheim tunneling. The bytes are progra mm ed one byte at a time using the EPROM programming mechanism of hot electron injection.
BLOCK DIAGRAM
DQ0DQ7 VCC V SS VPP Erase Voltage Switch To Array WE # State Control Command Register CE# OE# Program Voltage Switch Chip Enable Output Enable Logic Input/Output Buffers
Data Latch
Y-Decoder Low V CC Detector Address Latch Program/Erase Pulse Timer
Y-Gating
X-Decoder
1,048,576 Bit Cell Matrix
A0A16
11559I-1
PRODUCT SELECTOR GUIDE
Family Part Number Speed Options (VCC = 5.0 V ± 10%) Max Access Time (ns) CE# (E#) Access (ns) OE# (G#) Access (ns) -70 70 70 35 -90 90 90 35 Am28F010 -120 120 120 50 -150 150 150 55 -200 200 200 55
2
A m28F010
CONNECTION DIAGRAMS
P D IP PLCC
VPP A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 DQ0 DQ1 DQ2 VSS
A16
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
WE# (W#) NC A14 A13 A8 A9 A11 OE# (G#) A10 CE# (E#) DQ7 DQ6 A7 A6 A5 A4 A3 A2 A1 A0 DQ0 5 6 7 8 9 10 11 12 13
43
2
1 32 31 30 29 28 27 26 25 24 23 22 21 A14 A13 A8 A9 A11 OE# (G#) A10 CE# (E#) DQ7
14 15 16 17 18 19 20 VSS DQ3 DQ1 DQ2 DQ4 DQ5 DQ6
DQ5 DQ4 DQ3
11559I-2
VCC
A12 A15
1
32
V PP
VCC
WE# (W#) NC
11559I-3
Note: Pin 1 is marked for orientation.
Am28F010
3
CONNECTION DIAGRAMS (continued)
TSOP
A11 A9 A8 A13 A14 NC WE # VCC NC A16 A15 A12 A7 A6 A5 A4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 OE# A10 CE# D7 D6 D5 D4 D3 V SS D2 D1 D0 A0 A1 A2 A3
32-Pin TSOP--Standard Pinout
OE# A10 CE# D7 D6 D5 D4 D3 V SS D2 D1 D0 A0 A1 A2 A3
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
A11 A9 A8 A13 A14 NC WE# VCC NC A16 A15 A12 A7 A6 A5 A4
11559I-4
32-Pin TSOP--Reverse Pinout
LOGIC SYMBOL
17 A0A16 DQ0DQ7 CE# (E#) OE# (G#) WE# (W#) 8
11559I-5
4
A m28F010
ORDERING INFORMATION Standard Products
AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of: AM28F010 -70 J C B OPTIONAL PROCESSING Blank = Standard Processing B = Bur n-In Contact an AMD representative for more information. TEMPERATURE RANGE C = Commercial (0°C to +70°C) I = Industrial (40°C to +85°C) E = Extended (55°C to +125°C) PACKAGE TYPE P = 32-Pin Plastic DIP (PD 032) J = 32-Pin Rectangular Plastic Leaded Chip Carrier (PL 032) E = 32-Pin Thin Small Outline Package (TSOP) Standard Pinout (TS 032) F = 32-Pin Thin Small Outline Package (TSOP) Reverse Pinout (TSR032) SPEED OPTION See Product Selector Guide and Valid Combinations
DEVICE NUMBER/DESCRIPTION Am28F010 1 Megabit (128 K x 8-Bit) CMOS Flash Memory
Valid Combinations AM28F010-70 AM28F010-90 AM28F010-120 AM28F010-150 AM28F010-200 PC, PI, PE, JC, JI, JE, EC, EI, EE, FC, FI, FE
Valid Combinations Val id Combinations list configurations planned to be suppor ted in volume for this device. Consult the local AMD sales office to confirm availability of specific valid combinations and to check on newly released combinations.
Am28F010
5
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