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Part: AM28F020A-150FI

Category:

Description: 2 Megabit CMOS 12.0 Volt, Bulk Erase Flash Memory With Embedded Algorithms

Company: Advanced Micro Devices, Inc.

Datasheet: Download AM28F020A-150FI datasheet     File size : 427 kB

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Datasheet text preview:
FINAL

Am28F020
2 Megabit (256 K x 8-Bit) CMOS 12.0 Volt, Bulk Erase Flash Memory
DISTINCTIVE CHARACTERISTICS
s High performance -- Access times as fast as 70 ns s CMOS low power consumption -- 30 mA maximum active current -- 100 µA maximum standby current -- No data retention power consumption s Compatible with JEDEC-standard byte-wide 32-pin EPROM pinouts -- 32-pin PDIP -- 32-pin PLCC -- 32-pin TSOP s 10,000 write/erase cycles minimum s Write and erase voltage 12.0 V ±5% s Latch-up protected to 100 mA from ­1 V to VCC +1 V s Flasherase Electrical Bulk Chip Erase -- One second typical chip erase time s Flashrite Programming -- 10 µs typical byte program time -- 4 s typical chip program time s Command register architecture for microprocessor/microcontroller compatible write interface s On-chip address and data latches s Advanced CMOS flash memory technology -- Low cost single transistor memory cell s Automatic write/erase pulse stop timer

GENERAL DESCRIPTION
Th e Am28F020 is a 2 Megabit Flash memory organized as 256 Kbytes of 8 bits each. AMD's Flash memor ies offer the most cost-effective and reliable read/ w r i t e non-volatile random access memor y. The A m 28F 0 20 is packaged in 32-pin PDIP, PLCC, and TSOP versions. It is designed to be reprogrammed and erased in-system or in standard EPROM programmers. T h e Am 2 8 F 0 2 0 i s eras e d w h e n s h i p p e d from the factory. The standard Am28F020 offers access times of as fast a s 70 ns, allowing high speed microprocessors to operate without wait states. To eliminate bus contention, the device has separate chip enable (CE#) and output enable (OE#) controls. AMD's Flash memories augment EPROM functionality with in-circuit electrical erasure and programming. The Am28F020 uses a command register to manage this functionality, while maintaining a JEDEC-standard 32pin pinout. The command register allows for 100% TTL level control inputs and fixed power supply levels during erase and programming, while maintaining maximum EPROM compatibility. AMD's Flash technology reliably stores memory contents even after 10,000 erase and program cycles. The AMD cell is designed to optimize the erase and programming mechanisms. In addition, the combination of a dva nce d tunnel oxide processing and low internal electric fields for erase and programming operations p r o d u c e s reliable cycling. The Am28F020 uses a 12.0±5% VPP supply input to perform the Flasherase and Flashrite functions. The highest degree of latch-up protection is achieved with AMD's proprietary non-epi process. Latch-up prot e c t i o n is provided for stresses up to 100 mA on address and data pins from ­1 V to VCC +1 V. T h e Am28F020 is byte programmable using 10 µs p r o g r a m m i n g pulses in accordance with AMD's F la sh r ite programming algorithm. The typical room tem peratu re programming time of the Am28F020 is four seconds. The entire chip is bulk erased using 10 m s erase pulses according to AMD's Flasherase a l g o r it h m . Typical erasure at room temperature is accomplished in less than one second. The windowed package and the 15­20 minutes required for EPROM erasure using ultraviolet light are eliminated. Commands are written to the command register using standard microprocessor write timings. Register contents serve as input to an internal state-machine, which controls the erase and programming circuitry. During write cycles, the command register internally latches

Publication# 14727 Rev: F Amendment/+2 Is sue Date: January 1998

addresses and data needed for the programming and erase operations. For system design simplification, the Am28F020 is designed to support either WE# or CE# c o n t r o l l e d w r i t e s . During a system write cycle, addresses are latched on the falling edge of WE# or CE#, whichever occurs last. Data is latched on the rising edge of WE# or CE#, whichever occurs first. To simplify d iscu ssio n, the WE# pin is used as the write cycle

control pin throughout the rest of this data sheet. All setup and hold times are with respect to the WE# signal. A MD's Flash technology combines years of EPROM and EEPROM experience to produce the highest levels o f quality, reliability, and cost effectiveness. The Am28F020 electrically erases all bits simultaneously using Fowler-Nordheim tunneling. The bytes are prog r a m m e d one byte at a time using the EPROM programming mechanism of hot electron injection.

PRODUCT SELECTOR GUIDE
Family Part Number Speed Options (VCC = 5.0 V ± 10%) Max Access Time (ns) CE# (E#) Access (ns) OE# (G#) Access (ns) -70 70 70 35 -90 90 90 35 Am28F020 -120 120 120 50 -150 150 150 55 -200 200 200 55

BLOCK DIAGRAM
DQ0­DQ7

VCC VSS VPP
Erase Voltage Switch Input/Output Buffers

To Array WE# State Control Command Register CE# OE# Program Voltage Switch

Chip Enable Output Enable Logic Data Latch

Program/Erase Pulse Timer Y-Decoder Address Latch Y-Gating

Low VCC Detector

X-Decoder

2,097,152 Bit Cell Matrix

A0­A17
14727F-1

2

Am28F020

CONNECTION DIAGRAMS
PDIP
VPP A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 DQ0 DQ1 DQ2 VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VCC A17

PLCC

A14 A13 A8 A9 A11 OE# (G#) A10 CE# (E#) DQ7 DQ6 DQ5 DQ4 DQ3
14727F - 2

432 A7 A6 A5 A4 A3 A2 A1 A0 DQ0 5 6 7 8 9 10 11 12 13

1 32 31 30 29 28 27 26 25 24 23 22 21 A14 A13 A8 A9 A11 OE# (G#) A10 CE# (E#) DQ7

14 15 16 17 18 19 20 VSS DQ3 DQ1 DQ2 DQ4 DQ5 DQ6

WE# (W#) A17

WE# (W#)

A16

VCC

A12 A15

VPP

14727F-3

Note: Pin 1 is marked for orientation.

Am28F020

3

CONNECTION DIAGRAMS (continued)
TSOP
A11 A9 A8 A13 A14 A17 WE# V CC VPP A16 A15 A12 A7 A6 A5 A4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 OE# A10 CE# D7 D6 D5 D4 D3 VSS D2 D1 D0 A0 A1 A2 A3

32-Pin TSOP--Standard Pinout
OE# A10 CE# D7 D6 D5 D4 D3 VSS D2 D1 D0 A0 A1 A2 A3

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17

A11 A9 A8 A13 A14 A17 WE# V CC VPP A16 A15 A12 A7 A6 A5 A4
14727F - 4

32-Pin TSOP--Reverse Pinout

LOGIC SYMBOL

18 A0­A17 DQ0­DQ7 CE# (E) OE# (G#) WE# (W#) 8

14727F -5

4

Am28F020

ORDERING INFORMATION Standard Products
AMD standard products are available in several packages and operating ranges. The ordering number (Valid Combination) is formed by a combination of the following:

AM28F020

-70

J

C

B OPTIONAL PROCESSING Blank = Standard Processing B = Burn-In Contact an AMD representative for more information. TEMPERATURE RANGE C = Commercial (0°C to +70°C) I = Industrial (­40°C to +85°C) E = Extended (­55°C to +125°C) PACKAGE TYPE P = 32-Pin Plastic DIP (PD 032) J = 32-Pin Rectangular Plastic Leaded Chip Carrier (PL 032) E = 32-Pin Thin Small Outline Package (TSOP) Standard Pinout (TS 032) F = 32-Pin Thin Small Outline Package (TSOP) Reverse Pinout (TSR032) SPEED OPTION See Product Selector Guide and Valid Combinations

DEVICE NUMBER/DESCRIPTION Am28F020 2 Megabit (256 K x 8-Bit) CMOS Flash Memory

Valid Combinations AM28F020-70 AM28F020-90 AM28F020-120 AM28F020-150 AM28F020-200 PC, PI, PE, JC, JI, JE, EC, EI, EE, FC, FI, FE

Valid Combinations Valid Combinations list configurations planned to be supported in volume for this device. Consult the local AMD sales office to confirm availability of specific valid combinations and to check on newly released combinations.

Am28F020

5




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