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Part: Am29LV641MH112R
Category:
Memory
-> Flash
-> 64 Mb
Description: 64 Mbit (4 M X 16-Bit) 3.0 Volt-only, Uniform Sector With Versatilei/o Control Featuring Mirrorbit Technology
Company: Advanced Micro Devices, Inc.
Datasheet: Download Am29LV641MH112R datasheet File size : 1450 kB
Request For quote: Find where to buy Am29LV641MH112R
Datasheet text preview:
Am29LV641MH/L
Data Sheet
For new designs, S29GL064M supercedes Am29LV641MH/L and is the factory-recommended migration path for this device. Please refer to the S29GLxxxM Family Datasheet for specifications and ordering information.
July 2003 The following document specifies Spansion memory products that are now offered by both Advanced Micro Devices and Fujitsu. Although the document is marked with the name of the company that originally developed the specification, these products will be offered to customers of both AMD and Fujitsu.
Continuity of Specifications
There is no change to this datasheet as a result of offering the device as a Spansion product. Any changes that have been made are the result of normal datasheet improvement and are noted in the document revision summary, where supported. Future routine revisions will occur when appropriate, and changes will be noted in a revision summary.
Continuity of Ordering Part Numbers
AMD and Fujitsu continue to support existing part numbers beginning with "Am" and "MBM". To order these products, please use only the Ordering Part Numbers listed in this document.
For More Information
Ple ase contact your local AMD or Fujitsu sales office for additional information about Spansion memory solutions.
Publication Number 25261 Revision B
Amendment +8 Issue Date February 13, 2004
THIS PAGE LEFT INTENTIONALLY BLANK.
For new designs, S29GL064M supercedes Am29LV641MH/L and is the factory-recommended migration path for this device. Please refer to the S29GLxxxM Family Datasheet for specifications and ordering information.
Am29LV641MH/L
64 Megabit (4 M x 16-Bit) MirrorBitTM 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/OTM Control
DISTINCTIVE CHARACTERISTICS
ARCHITECTURAL ADVANTAGES Single power supply operation -- 3 V for read, erase, and program operations VersatileI/OTM control -- Device generates data output voltages and tolerates data input voltages on CE# and the DQ inputs/outputs as determined by the voltage on the VIO pin; operates from 1.65 to 3.6 V Manufactured on 0.23 µm MirrorBit process technology SecSiTM (Secured Silicon) Sector region -- 128-word sector for permanent, secure identification through an 8-word random Electronic Serial Number, accessible through a command sequence -- May be programmed and locked at the factory or by the customer Flexible sector architecture -- One hundred twenty-eight 32 Kword sectors Compatibility with JEDEC standards -- Provides pinout and software compatibility for single-power supply flash, and superior inadvertent write protection Minimum 100,000 erase cycle guarantee per sector 20-year data retention at 125°C PERFORMANCE CHARACTERISTICS High performance -- 90 ns access time -- 25 ns page read times -- 0.5 s typical sector erase time -- 22 µs typical effective write buffer word programming time: 16-word write buffer reduces overall programming time for multiple-word updates -- 4-word page read buffer -- 16-word write buffer Low power consumption (typical values at 3.0 V, 5 MHz) -- 30 mA typical active read current -- 50 mA typical erase/program current -- 1 µA typical standby mode current Package options -- 48-pin TSOP SOFTWARE & HARDWARE FEATURES Software features -- Program Suspend & Resume: read other sectors before programming operation is completed -- Erase Suspend & Resume: read/program other sectors before an erase operation is completed -- Data# polling & toggle bits provide status -- Unlock Bypass Program command reduces overall multiple-word programming time -- CFI (Common Flash Interface) compliant: allows host system to identify and accommodate multiple flash devices Hardware features -- Sector Group Protection: hardware-level method of preventing write operations within a sector group -- Temporar y Sector Unprotect: VID-level method of changing code in locked sectors -- ACC (high voltage) input accelerates programming time for higher throughput during system production -- Write Protect input (WP#) protects first or last sector regardless of sector protection settings -- Hardware reset input (RESET#) resets device
This document contains information on a product under development at Advanced Micro Devices. The information is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed product without notice.
Publication# 25261 Rev: B Amendment/+8 Issue Date: February 13, 2004
Refer to AMD's Website (www.amd.com) for the latest information.
ADVANCE
INFORMATION
GENERAL DESCRIPTION
T h e Am29LV641MH/L is a 64 Mbit, 3.0 volt single p o w e r supply flash memory devices organized as 4,194,304 words. The devices have a 16-bit wide data bus, and can be programmed either in the host system or in standard EPROM programmers. An access time of 90, 100, 110, or 120 ns is available. N o te that each access time has a specific operating voltage range (VCC) and an I/O voltage range (VIO), as specified in the Product Selector Guide and the Orderi n g Information sections. The device is offered in a 48-pin TSOP package. Each device has separate chip enable (CE#), write enable (WE#) and output enable (OE#) controls. E a c h device requires only a single 3.0 volt power supply for both read and write functions. In addition to a V C C input, a high-voltage accelerated program ( AC C ) input provides shorter programming times through increased current. This feature is intended to facilitate factory throughput during system production, but may also be used in the field if desired. The device is entirely command set compatible with t h e JEDEC single-power-supply Flash standard. Co mman ds are written to the device using standard micro proce ssor write timing. Write cycles also intern a l ly latch addresses and data needed for the programming and erase operations. The sector erase architecture allows memory sectors to be erased and reprogrammed without affecting the data contents of other sectors. The device is fully erased when shipped from the factory. Device programming and erasure are initiated through command sequences. Once a program or erase opera tio n has begun, the host system need only poll the DQ7 (Data# Polling) or DQ6 (toggle) status bits to determine whether the operation is complete. To facilitate programming, an Unlock Bypass mode reduces command sequence overhead by requiring only two write cycles to program data instead of four. The VersatileI/OTM (VIO) control allows the host system to set the voltage levels that the device generates and tolerates on the CE# control input and DQ I/Os to the same voltage level that is asserted on the VIO pin. Refer to the Ordering Information section for valid VIO options. H a rdw a re data protection measures include a low V C C detector that automatically inhibits write operat io n s during power transitions. The hardware sector p r o t e ctio n feature disables both program and erase op erations in any combination of sectors of memory. Th is can be achieved in-system or via programming equipment. T h e Erase Suspend/Erase Resume feature allows the host system to pause an erase operation in a given se cto r to read or program any other sector and then c o m p l e t e the erase operation. The Program Suspend/Program Resume feature enables the host system to pause a program operation in a given sector to read any other sector and then complete the program operation. The hardware RESET# pin terminates any operation in progress and resets the device, after which it is then rea dy for a new operation. The RESET# pin may be tied to the system reset circuitry. A system reset would thus also reset the device, enabling the host system to read boot-up firmware from the Flash memory device. T h e device reduces power consumption in the standby mode when it detects specific voltage levels on CE# and RESET#, or when addresses have been stable for a specified period of time. T h e SecSiTM (Secured Silicon) Sector provides a 1 2 8 - w o r d area for code or data that can be permanently protected. Once this sector is protected, no further changes within the sector can occur. The Write Protect (WP#) feature protects the first or la st sector by asserting a logic low on the WP# pin. The protected sector will still be protected even during accelerated programming. A M D MirrorBit flash technology combines years of Flash memory manufacturing experience to produce the highest levels of quality, reliability and cost effectiveness. The device electrically erases all bits within a sector simultaneously via hot-hole assisted erase. The data is programmed using hot electron injection.
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Am29LV641MH/L
February 13, 2004
ADVANCE
INFORMATION
MIRRORBIT 64 MBIT DEVICE FAMILY
Device LV065MU LV640MT/B LV640MH/L LV641MH/L LV640MU Bus x8 x8/x16 x8/x16 x16 x16 Sector Architecture Unifor m (64K-byte) Boot (8x8K-byte @ top & bottom) Unifor m (64K-byte) Unifor m (32K-word) Unifor m (32K-word) Packages 48-pin TSOP (std. & rev. pinout), 63-ball FBGA 48-pin TSOP, 63-ball Fine-pitch BGA, 64-ball Fortified BGA 56-pin TSOP (std. & rev. pinout), 64 Fortified BGA 48-pin TSOP (std. & rev. pinout) 63-ball Fine-pitch BGA, 64 Ball Fortified BGA VIO Yes No Yes Yes Yes RY/BY# Yes Yes Yes No Yes WP#, ACC ACC only WP#/ACC pin WP#/ACC pin Separate WP# and ACC pins ACC only WP# Protection No WP# 2 x 8 Kbyte top or bottom 1 x 64 Kbyte high or low 1 x 32 Kword top or bottom No WP#
RELATED DOCUMENTS
To download related documents, click on the following links or go to www.amd.comFlash MemoryProduct InformationMirrorBitFlash InformationTechnical Documentation. MirrorBitTM Flash Memory Write Buffer Programming and Page Buffer Read I m p le m e n t i n g a Common Layout for AMD MirrorBit and Intel StrataFlash Memory Devices AMD MirrorBitTM White Paper Migrating from Single-byte to Three-byte Device IDs
February 13, 2004
Am29LV641MH/L
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