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Part: AM29LV800BT70RSC

Category:
 Memory
   -> Flash

Description: 8 Megabit ( 1 M X 8-bit/512 K X 16-bit ) CMOS 3.0 Volt-only, Boot Sector Flash Memory-die Revision 1

Company: Advanced Micro Devices, Inc.

Datasheet: Download AM29LV800BT70RSC datasheet     File size : 1450 kB

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Datasheet text preview:
SUPPLEMENT

Am29LV800B Known Good Die
8 Megabit (1 M x 8-Bit/512 K x 16-Bit) CMOS 3.0 Volt-only, Boot Sector Flash Memory--Die Revision 1
DISTINCTIVE CHARACTERISTICS
s Single power supply operation -- 2.7 to 3.6 V for read, program, and erase operations -- Ideal for battery-powered applications s Manufactured on 0.35 µm process technology s High performance -- 90 or 120 ns access time s Low power consumption (typical values at 5 MHz) -- 200 nA Automatic Sleep mode current -- 200 nA standby mode current -- 7 mA read current -- 15 mA program/erase current s Flexible sector architecture -- One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and fifteen 64 Kbyte sectors (byte mode) -- One 8 Kword, two 4 Kword, one 16 Kword, and fifteen 32 Kword sectors (word mode) -- Supports full chip erase -- Sector Protection features: A hardware method of locking a sector to prevent any program or erase operations within that sector Sectors can be locked in-system or via programming equipment Temporary Sector Unprotect feature allows code changes in previously locked sectors s Unlock Bypass Program Command -- Reduces overall programming time when issuing multiple program command sequences s Top or bottom boot block configurations available s Embedded Algorithms -- Embedded Erase algorithm automatically preprograms and erases the entire chip or any combination of designated sectors -- Embedded Program algorithm automatically writes and verifies data at specified addresses s Minimum 1,000,000 write cycle guarantee per sector s Compatibility with JEDEC standards -- Pinout and software compatible with singlepower supply Flash -- Superior inadvertent write protection s Data# Polling and toggle bits -- Provides a software method of detecting program or erase operation completion s Ready/Busy# pin (RY/BY#) -- Provides a hardware method of detecting program or erase cycle completion s Erase Suspend/Erase Resume -- Suspends an erase operation to read data from, or program data to, a sector that is not being erased, then resumes the erase operation s Hardware reset pin (RESET#) -- Hardware method to reset the device to reading array data

Publication# 21356 Rev: B Amendment/+1 Issue Date: March 1998

SUPPLEMENT

GENERAL DESCRIPTION
The Am29LV800B in Known Good Die (KGD) form is an 8 Mbit, 3.0 volt-only Flash memory. AMD defines KGD as standard product in die form, tested for functionality and speed. AMD KGD products have the same reliability and quality as AMD products in packaged form. Am29LV800B Features T h e Am29LV800B is an 8 Mbit, 3.0 volt-only Flash m e m o r y organized as 1,048,576 bytes or 524,288 words. The word-wide data (x16) appears on DQ15­ DQ0; the byte-wide (x8) data appears on DQ7­DQ0. To eliminate bus contention the device has separate c h i p enable (CE#), write enable (WE#) and output enable (OE#) controls. T h e device requires only a single 3.0 volt power supply for both read and write functions. Internally generated and regulated voltages are provided for the program and erase operations. No VPP is required for program or erase operations. The device can also be programmed in standard EPROM programmers. The device is entirely command set compatible with the JEDEC single-power-supply Flash standard. Commands are written to the command register using standard microprocessor write timings. Register contents serve as input to an internal state-machine that controls the erase and programming circuitry. Write cycles also internally latch addresses and data needed for the programming and erase operations. Reading data out of the device is similar to reading from other Flash or EPROM devices. Device programming occurs by executing the program c o m m a n d sequence. This initiates the Embedded Program algorithm--an internal algorithm that automatically times the program pulse widths and verifies proper cell margin. The Unlock Bypass mode facilitates faster programming times by requiring only two write cycles to program data instead of four. D e v i c e erasure occurs by executing the erase c o m m a n d sequence. This initiates the Embedded Erase algorithm--an internal algorithm that automatica lly preprograms the array (if it is not already prog r a m m e d ) before executing the erase operation. During erase, the device automatically times the erase pulse widths and verifies proper cell margin. The host system can detect whether a program or erase operation is complete by observing the RY/BY# pin, or by reading the DQ7 (Data# Polling) and DQ6 (toggle) status bits. After a program or erase cycle has been completed, the device is ready to read array data or accept another command. The sector erase architecture allows memory sectors to be erased and reprogrammed without affecting the d a t a contents of other sectors. The device is fully erased when shipped from the factory. Hardware data protection measures include a low VCC detector that automatically inhibits write operations during power transitions. The hardware sector protection feature disables both program and erase o p e r a t i o n s in any combination of the sectors of m em ory. This can be achieved in-system or via programming equipment. The Erase Suspend feature enables the user to put erase on hold for any period of time to read data from, or program data to, any sector that is not selected for erasure. True background erase can thus be achieved. The hardware RESET# pin terminates any operation in progress and resets the internal state machine to reading array data. The RESET# pin may be tied to the system reset circuitry. A system reset would thus also reset the device, enabling the system microprocessor to read the boot-up firmware from the Flash memory. The device offers two power-saving features. When addresses have been stable for a specified amount of time, the device enters the automatic sleep mode. The system can also place the device into the standby mode. Power consumption is greatly reduced in both these modes. A M D 's Flash technology combines years of Flash m e m o r y manufacturing experience to produce the highest levels of quality, reliability and cost effectiven e s s . The device electrically erases all bits within a sector simultaneously via Fowler-Nordheim tunn e l i n g . The data is programmed using hot electron inject ion.

ELECTRICAL SPECIFICATIONS
R e f e r to the Am29LV800B data sheet, publication number 21490, for full electrical specifications on the Am29LV800B in KGD form.

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Am29LV800B Known Good Die

SUPPLEMENT

PRODUCT SELECTOR GUIDE
Family Part Number Speed Option (VCC = 2.7 ­ 3.6 V) Max Access Time, tACC (ns) Max CE# Access, tCE (ns) Max OE# Access, tOE (ns) -90 90 90 35 Am29LV800B KGD -120 120 120 50

DIE PHOTOGRAPH

Orientation relative to leading edge of tape and reel

Orientation relative to top left corner of Gel-Pak

Am29LV800B Known Good Die

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SUPPLEMENT

DIE PAD LOCATIONS

9

8

7

6

5

4

32

1

44 43 42 41 40 39 38

37 36

10 11 12

35 34 33

AMD logo location

13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

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Am29LV800B Known Good Die

SUPPLEMENT

PAD DESCRIPTION
Pad 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 Signal V CC DQ4 DQ12 DQ5 DQ13 DQ6 DQ14 DQ7 DQ15/A­1 VSS BYTE# A16 A15 A14 A13 A12 A11 A10 A9 A8 WE# RESET# RY/BY# A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE# VSS OE# DQ0 DQ8 DQ1 DQ9 DQ2 DQ10 DQ3 DQ11 Pad Center (mils) X Y 0.00 0.00 ­12.74 0.00 ­18.96 0.00 ­25.11 0.00 ­31.33 0.00 ­37.48 0.00 ­43.71 0.00 ­49.85 0.00 ­56.08 0.00 ­66.01 ­1.69 ­66.01 ­12.30 ­66.01 ­22.92 ­65.65 ­266.81 ­59.50 ­266.81 ­53.80 ­266.81 ­47.65 ­266.81 ­41.95 ­266.81 ­35.80 ­266.81 ­30.09 ­266.55 ­23.85 ­266.81 ­18.15 ­266.81 ­8.06 ­270.78 10.07 ­270.78 20.14 ­266.81 25.85 ­266.81 31.99 ­266.81 37.70 ­266.81 43.84 ­266.81 49.55 ­266.81 55.69 ­266.81 61.40 ­266.81 67.54 ­266.81 67.91 ­23.08 67.91 ­12.45 67.91 ­1.91 58.00 2.27 50.02 0.00 43.79 0.00 37.65 0.00 31.42 0.00 25.28 0.00 19.05 0.00 12.91 0.00 6.68 0.00 Pad Center (millimeters) X Y 0.0000 0.0000 ­0.3235 0.0000 ­0.4817 0.0000 ­0.6377 0.0000 ­0.7959 0.0000 ­0.9519 0.0000 ­1.1101 0.0000 ­1.2661 0.0000 ­1.4243 0.0000 ­1.6767 ­0.0430 ­1.6767 ­0.3123 ­1.6767 ­0.5822 ­1.6674 ­6.7770 ­1.5114 ­6.7770 ­1.3664 ­6.7770 ­1.2104 ­6.7770 ­1.0654 ­6.7770 ­0.9094 ­6.7770 ­0.7644 ­6.7704 ­0.6059 ­6.7770 ­0.4609 ­6.7770 ­0.2047 ­6.8778 0.2558 ­6.8778 0.5116 ­6.7770 0.6566 ­6.7770 0.8126 ­6.7770 0.9576 ­6.7770 1.1136 ­6.7770 1.2586 ­6.7770 1.4146 ­6.7770 1.5596 ­6.7770 1.7156 ­6.7770 1.7249 ­0.5862 1.7249 ­0.3163 1.7249 ­0.0484 1.4732 0.0576 1.2705 0.0000 1.1123 0.0000 0.9563 0.0000 0.7981 0.0000 0.6421 0.0000 0.4839 0.0000 0.3279 0.0000 0.1697 0.0000

Note: The coordinates above are relative to the center of pad 1 and can be used to operate wire bonding equipment.

Am29LV800B Known Good Die

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