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Part: ELANSC520-133AC
Category:
Microcontrollers
-> 32 bit
-> Élan™ Family
Description:
Company: Advanced Micro Devices, Inc.
Datasheet: Download ELANSC520-133AC datasheet File size : 2616 kB
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Datasheet text preview:
PRELIMINARY
ÉlanTMSC520 Microcontroller
Integrated 32-Bit Microcontroller with PC/AT-Compatible Peripherals, PCI Host Bridge, and Synchronous DRAM Controller
DISTINCTIVE CHARACTERISTICS
s Industry-standard Am5x86® CPU with floating s ROM/Flash controller for 8-, 16-, and 32-bit devices s Enhanced PC/AT-compatible peripherals
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point unit (FPU) and 16-Kbyte write-back cache 100-MHz and 133-MHz operating frequencies Low-voltage operation (core VCC = 2.5 V) 5-V tolerant I/O (3.3-V output levels) E86TM family of x86 embedded processors Par t of a software-compatible family of microprocessors and microcontrollers well supported by a wide variety of development tools Integrated PCI host bridge controller leverages standard peripherals and software 33 MHz, 32-bit PCI bus Revision 2.2-compliant High-throughput 132-Mbyte/s peak transfer Suppor ts up to five external PCI masters Integrated write-posting and read-buffering for high-throughput applications Synchronous DRAM (SDRAM) controller Suppor ts 16-, 64-, 128-, and 256-Mbit SDRAM Suppor ts 4 banks for a total of 256 Mbytes Error Correction Code provides system reliability Buffers improve read and write performance AMDebugTM technology offers a low-cost solution for the advanced debugging capabilities required by embedded designers Allows instruction tracing during execution from the Am5x86 CPU's internal cache Uses an enhanced JTAG port for low-cost debugging Parallel debug port for high-speed data exchange during in-circuit emulation General-Purpose (GP) bus with programmable timing for 8- and 16-bit devices provides good performance at low cost
provide improved performance Enhanced programmable interrupt controller (PIC) prioritizes 22 interrupt levels (up to 15 external sources) with flexible routing Enhanced DMA controller includes double buffer chaining, extended address and transfer counts, and flexible channel routing Two 16550-compatible UARTs operate at baud rates up to 1.15 Mbit/s with optional DMA interface s Standard PC/AT-compatible peripherals Programmable interval timer (PIT) Real-time clock (RTC) with battery backup capability and 114 bytes of RAM s Additional integrated peripherals Three general-purpose 16-bit timers provide flexible cascading for 32-bit operation Watchdog timer guards against runaway software Software timer Synchronous serial interface (SSI) offers full-duplex or half-duplex operation Flexible address decoding for programmable memory and I/O mapping and system addressing configuration s 32 programmable input/output (PIO) pins
s Native support for pSOS, QNX, RTXC, VxWorks,
and Windows® CE operating systems s Industry-standard BIOS support s Plastic Ball Grid Array (PBGA388) package
GENERAL DESCRIPTION
The ÉlanTMSC520 microcontroller is a full-featured mic r o c o n t r o l l e r developed for the general embedded market. The ÉlanSC520 microcontroller combines a 32 - bi t, low-voltage Am5 x86 CPU with a set of integrated peripherals suitable for both real-time and PC/ AT-compatible embedded applications. An integrated PCI host bridge, SDRAM controller, enhanced PC/AT-compatible peripherals, and advanced debugging features provide the system designer with a wide range of on-chip resources, allowing support for legacy devices as well as new devices available in the current PC marketplace.
© Copyright 2001 Advanced Micro Devices, Inc. All rights reserved.
Designed for medium- to high-performance applications in the telecommunications, data communications, and information appliance markets, the ÉlanSC520 microcontroller is particularly well suited for applications requiring high throughput combined with low latency. The compact Plastic Ball Grid Array (PBGA) package provides a high degree of functionality in a very small form factor, making it cost-effective for many applications. A 0.25-micron CMOS manufacturing process allows for low power consumption along with high performance.
Final Draft# 22003 Rev: B Amendment/0 Issue Date: March 2001
PRELIMINARY
ORDERING INFORMATION
ÉlanSC520 133 A C
TEMPERATURE RANGE C = Commercial (TC = 0C to +85C) where: TC = case temperature
PACKAGE TYPE A = 388-Pin Plastic Ball Grid Array (PBGA)
SPEED OPTION 100 = 100 MHz 133 = 133 MHz
DEVICE NUMBER/DESCRIPTION ÉlanSC520 integrated 32-bit microcontroller with PC/AT-compatible peripherals, PCI host bridge, and synchronous DRAM controller
Valid Combinations ÉlanSC520100 ÉlanSC520133 AC
Valid Combinations Valid combinations list configurations planned to be suppor ted in volume for this device. Consult the local AMD sales office to confirm availability of specific valid combinations and to check on newly released combinations.
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ÉlanTMSC520 Microcontroller Data Sheet
PRELIMINARY
TABLE OF CONTENTS
Distinctive Characteristics ... 1 General Description ............ 1 Ordering Information ........... 2 Logic Diagram by Interface .. 6 Logic Diagram by Default Pin Function ....... 7 Connection Diagram ........... 8 Pin Designations ...... 10 Pin Designations (Pin Number) ............ 11 Pin Designations (Pin Name) ...... 13 Signal Descriptions ............ 16 Architectural Overview ...... 28 Industry-Standard x86 Architecture ...... 30 AMDebugTM Technology for Advanced Debugging ..... 30 Industry-Standard PCI Bus Interface ... 30 High-Performance SDRAM Controller ......... 30 ROM/Flash Controller .. 30 Flexible Address-Mapping Hardware ... 31 Easy-to-Use GP Bus Interface .... 31 Clock Generation ......... 31 Integrated Peripherals .. 31 JTAG Boundary Scan Test Interface ... 32 System Test and Debug Features ....... 32 Applications ............. 33 Clock Generation and Control ......... 38 Internal Clocks .... 39 Clock Specifications ..... 40 Clock Pin Loading ........ 40 Selecting a Crystal ....... 41 32.768-kHz Crystal Selection .......... 41 33-MHz Crystal Selection....... 42 Third Overtone Crystal Component Selection ......... 42 Running the ÉlanTMSC520 Microcontroller at 33.333 MHz .. 43 Bypassing Internal Oscillators ..... 44 RTC Voltage Monitor ........ 45 Backup Battery Considerations ............ 46 Using an External RTC Backup Battery ......... 46 Not Using an External RTC Backup Battery............ 46 Absolute Maximum Ratings ............. 48 Operating Ranges at Commercial Temperatures .... 48 Voltage Levels for Non-PCI Interface Pins ........ 49 Voltage Levels for PCI Interface Pins ....... 49 DC Characteristics Over Commercial Operating Ranges .......... 50 Capacitance ............. 51 Non-PCI Interface Pin Capacitance ..... 51 PCI Interface Pin Capacitance .... 51 Crystal Capacitance ..... 51 Derating Curves ........... 51 Power Characteristics ....... 56 Thermal Characteristics ..........56 388-Pin PBGA Package ....56 Switching Characteristics and Waveforms ........ 58 Key to Switching Waveforms ...... 58
ÉlanTMSC520 Microcontroller Data Sheet 3
PRELIMINARY
AC Switching Test Waveforms ........ 58 Non-PCI Bus Interface Pins ........ 58 PCI Bus Interface Pins .......... 58 Switching Characteristics over Commercial Operating Ranges ...........59 Power-On Reset Timing ........ 59 Reset Timing with Power Applied ........ 61 ROM Timing ........ 63 PCI Bus Timing ............ 65 SDRAM Timing ............ 66 SDRAM Clock Timing .. 68 GP Bus Timing .... 69 GP Bus DMA Read Cycle Timing ........ 71 GP Bus DMA Write Cycle Timing ......... 72 SSI Timing ........... 73 JTAG Timing ....... 74 Appendix A: Pin Tables ...A-1 Pin List Summary Table Column Definitions .......... A-6 Appendix B: Physical Dimensions ...........B-1 388-Pin Plastic BGA (PBGA) Package ........B-1 Top View ............B-1 Bottom View ......B-2 Circuit Board Layout Considerations ...B-3 Appendix C: Customer Support ......C-1 Related Documents .....C-2 Additional Information ..........C-2 Customer Development Platform ........C-2 Third-Party Development Support Products .........C-2 Customer Service ........C-3 Hotline and World Wide Web Support........... C-3 Corporate Applications Hotline....... C-3 World Wide Web Home Page ........ C-3 Documentation and Literature ........ C-3 Literature Ordering .......... C-3 Index .. Index-1
LIST OF FIGURES
Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15.
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ÉlanTMSC520 Microcontroller Block Diagram ....... 29 ÉlanTMSC520 Microcontroller-Based Smart Residential Gateway Reference Design ....... 34 ÉlanTMSC520 Microcontroller-Based Thin Client Reference Design ........... 35 ÉlanTMSC520 Microcontroller-Based Digital Set Top Box Reference Design ....... 36 ÉlanTMSC520 Microcontroller-Based Telephone Line Concentrator Reference Design ....... 37 System Clock Distribution Block Diagram .... 38 Clock Source Block Diagram ........ 39 32.768-kHz Crystal Circuit ... 41 33.333-MHz Third Overtone Crystal Implementation ........... 43 Bypassing the 32.768-kHz Oscillator ........... 44 Bypassing the 33-MHz Oscillator ........ 44 RTC Voltage Monitor Block Diagram ........... 45 Circuit with Backup Battery .. 47 Circuit without Backup Battery ...... 47 I/O Drive 6-mA Rise Time .... 52
ÉlanTMSC520 Microcontroller Data Sheet
PRELIMINARY
Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. Figure 40. Figure 41.
I/O Drive 6-mA Fall Time ...... 52 I/O Drive 12-mA Rise Time .. 53 I/O Drive 12-mA Fall Time .... 53 I/O Drive 24-mA Rise Time .. 54 I/O Drive 24-mA Fall Time .... 54 PCI Pads Rise Time with 1-ns Rise/Fall ...... 55 PCI Pads Fall Time with 1-ns Rise/Fall ........ 55 Thermal Resistance (C/Watt) ...... 56 Thermal Characteristics Equations ..... 57 AC Switching Test Waveforms ...... 58 Power-Up Timing Sequence ......... 60 PWRGOOD Timing for RTC Standalone Mode .... 60 External System Reset Timing with Power Applied .... 61 PRGRESET Timing ..... 62 Internal System Reset Timing ....... 62 Non-Burst ROM Read Cycle Timing ............ 64 Page-Mode ROM Read Cycle Timing .......... 64 Flash Write Cycle Timing ..... 65 SDRAM Write and Read Timing ......... 67 SDRAM Clock Timing .......... 68 GP Bus Non-DMA Cycle Timing ......... 70 GP-DMA Read Cycle Timing ........ 71 GP-DMA Write Cycle Timing ......... 72 SSI Timing .... 73 JTAG Boundary Scan Timing ........ 74 BGA Ball Pad Layout ..........B-3
LIST OF TABLES
Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Signal Descriptions Table Definitions............ 16 Signal Descriptions ..... 17 Clock Jitter Specifications .... 40 Clock Startup and Lock Times ...... 40 Oscillator Input Specifications ....... 40 Analog VCC (VCC_ANLG) Specifications ... 40 PLL1 Loop Filter Components ...... 41 Timing Error as It Translates to Clock Accuracy .... 41 32.768-kHz Crystal Specifications ...... 42 33-MHz Crystal Specifications ...... 42 RTC Voltage Monitor Component Specifications ........ 46 Device Power Dissipation .... 56 VCC_ANLG and VCC_RTC Power Dissipation .... 56 Thermal Resistance (°C/W) qJC and qJA for BGA Package with 6-Layer Board ... 57 Maximum TA for Plastic BGA Package with 6-Layer Board with TCASE = 85°C .... 57 Multiplexed Signal Trade-Offs ......A-2 PIOs Sorted by PIO Number ........A-4 PIOs Sorted by Signal Name .......A-5 Pin List Summary Table Abbreviations ........ A-6 Pin List Summary .......A-7 Related AMD Products--E86TM Family Devices ........C-1
ÉlanTMSC520 Microcontroller Data Sheet
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