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Part: ACT15530CFB
Category:
Communication
Description: CMOS Manchester Encoder / Decoder
Company: Aeroflex Circuit Technology
Datasheet: Download ACT15530CFB datasheet File size : 445 kB
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Datasheet text preview:
ACT15530
CMOS Manchester Encoder / Decoder
Features
· MIL-STD-1553 Compatible
CIRCUIT TECHNOLOGY
· 1.25 Megabit/sec Maximum Data Rate · Sync Identification and Lock-in · Clock Recovery · Manchester II Encode / Decode · Separate Encoder and Decoder Sections · Low Operating Power · Military Temperature Range -55°C to +125°C · Monolithic Single Chip Construction
Valid Word Encoder Shift Clock Take Data Serial Data Out Decoder Clock Bipolar Zero In Bipolar One In Unipolar Data In Decoder Shift Clock Command/ Data Sync Decoder Reset VSS
1 2 3 4 5 6 7 8 9 10 11 12
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24 23 22 21 20 19 18 17 16 15 14 13
VDD Encoder Clock Send Clock In Send Data Sync Select Encoder Enable Serial Data In Bipolar One Out Output Inhibit Bipolar Zero Out ÷ 6 Out Master Reset
Figure 1: Pin Assignments (24-Pin DIP/Flat Package See Figure 18 for LCC Pkg)
· Available in Commercial and Industrial Temperature Ranges · Several Package and Quality Options (Consult Factory for Details) · Direct Replacement for the Obsolete Harris HD15530-9/-2/8 and GEC Plessey Marconi MA15530 / MAS15530 parts
1
General Description
The ACT15530 is a high performance CMOS integrated circuit used to implement MIL-STD-1553 and similar Manchester II encoded, time division multiplexed, serial data protocols. The device is divided into two independent sections, encoder and decoder, with a common master reset. The function of the encoder section is to produce the sync pulse and parity bit, and encode the data bits. The decoder section recognizes the sync pulse, decodes the data bits and checks for parity. The ACT15530 is fully guaranteed to support the 1 MHz data rate of MIL-STD-1553 over the full temperature and supply voltage ranges. The device interfaces with CMOS, TTL or N-Channel support circuitry and operates from a standard 5 volt supply. The circuit can also be used in many party line digital data communications applications where high reliability command and control signals are required. Using Aeroflex transceivers products (4400 Series) the Bit Error Rates (BER) and Word Error Rates (WER) of MIL-STD-1553 can be achieved (Refer to MIL-STD-1553 Multiplex Applications Handbook "MIL-HDBK-1553"). eroflex Circuit Technology Data Bus Modules For The Future © SCD15330 REV B 7/28/99
12 13 22 14
Vss Master Reset Send Clock In VDD Output Inhibit
24 16
÷ 6 Out ÷2 ÷6
Character Former
17 15
Bipolar One Out Bipolar Zero Out
23
Encoder Clock Bit Counter
21
Send Data
2
18
19
20
Sync Select
Send Data In Encoder Enable
Encoder Shift Clock
Note: All Pin designations are for 24-Pin DIP & Flatpak
Figure 2: Encoder Block Diagram
Unipolar Data In Bipolar One In Bipolar Zero In
8 7 6
Transition Finder Character Identifier
3 10 4
Take Data Command / Data Sync Serial Data Out
Decoder Clock
5
Synchronizer
Bit Rate Clock
Parity Check
1
Valid Word
Master Reset
13
9
Decoder Shift Clock
Decoder Reset
11
Bit Counter
Note: All Pin designations are for 24-Pin DIP & Flatpak
Figure 3: Decoder Block Diagram
Aeroflex Circuit Technology
2
SCD15530 REV B 7/28/99 Plainview NY (516) 694-6700
Pin Designations
Pin
1 2 3 4 5 6 7 8 9 10
Input
Output
Enc
Dec
Function
Valid word Encoder Shift Clock
Comment
A 'high' signals the receipt of a valid word Shifts data into the encoder on a 'low' to 'high' transition 'high' during data reception after the sync pulse is identified NRZ output of received data Clock for the transition finder and synchronizer which generates the clock for the rest of the decoder Should be 'high' when the bus is in a negative state. Must be tied 'high' when the unipolar input is used Should be 'high' when the bus is in a positive state. Must be tied 'low' when the unipolar input is used Input for unipolar data to the transition finder. Must be tied 'low' when not used Provides the DECODER CLOCK divided by 12, synchronized by the recovered serial data This output indicates the type of synchronizing character received as follows: If a data synchronizing character was received, this pin is low while the data is decoded. If a command synchronizing character was received, this pin is high during data decoding A 'high' during a DECODER SHIFT CLOCK rising edge resets the bit counter Ground A 'high" clears the counters in both sections Provides the ENCODER CLOCK divided by 6 Provides an active 'low' output to the zero or negative sense of a bipolar line driver A 'low' inhibits the BIPOLAR ZERO OUT and BIPOLAR ONE OUT by forcing them to inactive, 'high', states Provides an active 'low' output to the one or positive sense of a bipolar line driver Receives serial data at the rate of the ENCODER SHIFT CLOCK A 'high' starts the encode cycle provided that the previous cycle is complete A 'high' selects the command sync and a 'low' selects the data sync Provides an active 'high' to enable the external serial data source Clock input at 2 times the data rate Input to the divide by 6 circuit Positive Supply
Take Data Serial Data Out Decoder clock Bipolar Zero In Bipolar One In Unipolar Data In Decoder Shift Clock Command/Data Sync
11 12 13 14 15 16
Decoder Reset VSS Master Reset
÷ 6 Out
Bipolar Zero Out Output Inhibit
17 18 19 20 21 22 23 24
Bipolar One Out Serial Data In Encoder Enable Sync Select Send Data Send Clock In Encoder Clock
VDD
Figure 4: Pin Designations (24-Pin Dip/FlatPack)
Aeroflex Circuit Technology
3
SCD15530 REV B 7/28/99 Plainview NY (516) 694-6700
DC Characteristics and Ratings Absolute Maximum Ratings
Parameter
VDD Input Voltage Operating Temperature Storage Temperature
Min
3 Vss - 0.3 -55 -65
Max
7 VDD + 0.3V +125 +150
Units
V V °C °C
Figure 5: Absolute Maximum Ratings
DC Characteristics
Sym
VIH VIL V IHC V ILC IIL VOH VOL IDDSB
Parameter
Logic "1" Input Voltage Logic "0" Input Voltage Logic "1" Input Voltage (Clock) Logic "0" Input Voltage (Clock) Input Leakage Current Logic "1" Output Voltage Logic "0" Output Voltage Standby Supply Current
Min
70%VD D VDD - 0.5V -1.0 2.4 -
Typ
-
Max
30%VDD VSS + 0.5V +1.0
Units
V V V V µA V V mA
Test Conditions
0V < VIN < VDD IOH = -3 mA IOL = 1.8 mA Output Open VIN = VDD = 5.5V VDD = 5.5V, f = 1MHz
0.5
0.4 2.0
IDDOP CIN COUT
Operating Supply Current Input Capacitance Output Capacitance
-
8.0 5.0 8.0
10.0 7.0 10.0
mA pF pF
VDD = 5V ±10%, over full operating temperature range.
Figure 6: DC Characteristics
Aeroflex Circuit Technology
4
SCD15530 REV B 7/28/99 Plainview NY (516) 694-6700
AC Characteristics
Sym
fEC fESC tECR tECF fED tMR tE1 tE2 tE3 tE4 tE5 tE6 tE7 tE8 tE9
Parameter Encoder clock frequency Send clock frequency Encoder clock rise time Encoder clock fall time Data rate Master reset pulse width Shift clock delay Serial data setup time Serial data hold time Enable setup time Enable pulse width Sync setup time Sync pulse width Send data delay Bipolar output delay
Min
0 0 0 150 75 75 90 100 55 150 0 -
Limits Max
15 2.5 8 8 1.25 125 50 130
Units
MHz MHz ns ns MHz ns ns ns ns ns ns ns ns ns ns Figure 7: Encoder Electrical Characteristics
1. VDD = 5V ±10%, over full operating temperature range. 2. CL=50pF.
Sym
fDC tDCR tDCF fDD tDR tDRS tMR t D1 t D2 t D3 t D4 t D5 t D6 t D7 t D8 t D9 t D1 0 t D1 1
Parameter Decoder clock frequency Decoder clock rise time Decoder clock fall time Data rate Decoder reset pulse width Decoder reset setup time Master reset pulse width Bipolar data pulse width Sync transition span One-Zero overlap Short data transition span Long data transition span Sync delay (on) Take data delay (on) Serial data out delay Sync delay (off) Take data delay (off) Valid word delay
Limits Min
0 0 150 75 150 tDC + 10 -20 0 0 0 0
Typ
1 8 t DC 6 t DC 1 2 t DC -
Max
15 8 8 1.25 tDC - 10 110 110 80 110 110 110
Units
MHz MHz ns MHz ns ns ns ns ns ns ns ns ns ns ns ns ns ns Figure 8: Decoder Electrical Characteristics
1. VDD = 5V ±10%, over full operating temperature range. 2. CL=50pF. 3. tDC = Decoder clock period = 1/fDC
Aeroflex Circuit Technology
5
SCD15530 REV B 7/28/99 Plainview NY (516) 694-6700
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