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Details, datasheet, quote on part number:N4906A
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Datasheet text preview:
Agilent N4906A Serial BERT 3.6 Gb/s Bit Error Ratio Tester
Technical Specifications
General features
Internal hard disk For local storage of user patterns and data Removable storage MS-DOS® compatible 3.5" Superdrive (accepts 1.4 Mbyte HD disks & 120 Mbyte SuperDisksTM) Data entry Touch-sensitive display, numeric keypad with up/ down arrows, analogue feel position controls, or provided USB keyboard and mouse if desired. Display Internal 8" (diagonal) backlit LCD touch-screen Interfaces GPIB (IEEE 488), LAN ("10 Base T" Ethernet) for printing and file transfer, Parallel/Centronics printer port, external VGA output.
On-line help Context-sensitive On-Line help is included. Operation, programming and quick-start guides are also included and supplied on MS-Windows® compatible CD-ROM.
Accessories supplied
USB compatible keyboard; mouse; stylus; Quick Start Manual on paper; Quick Start Card. MS-Windows® compatible CD-ROM containing "PDF" files of Operating, Quick-Start, and Programming guides. Power Cord; 6x APC-3.5 connector savers (female to female); 6x 50 APC-3.5 (male) terminations, 3x 1 metre SMA (male to male) cables.
Pattern Generator
Pattern generator parameters
Operating frequency
Operating frequency 50 MHz to 3.6 GHz with external clock (optional) 50 MHz to 3.0 GHz with internal clock source
Test patterns
2N-1 PRBS 231-1, 223-1, 215-1, 210-1, 27-1 2N PRBS 223, 215, 210, 27 Variable mark density 1/8, 1/4, 1/2, 3/4, 7/8 User defined patterns Variable length patterns from 1 to 8 Mbits Alternating patterns Change between two equal length user patterns, each up to 4 Mbits long. Changeover is synchronous with the end of a pattern, under the control of the front panel or the Auxiliary Input. Error add Single, continuously variable between 1x102 and 1x109, and user specified bursts of errors. Pattern editor Fully flexible pattern editor included with "cut", "copy" and "paste" functions.
Internal clock source
Frequency range 50 MHz to 3.0 GHz Frequency accuracy ±20 ppm
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Pattern Generator Input/Output Specifications
Data and Data outputs
Data and Data outputs are independently settable
Clock and Clock outputs
Clock and Clock outputs are independently settable
Format: NRZ Amplitude: 0.5 to 2 V in 10 mV steps Polarity: Normal or Inverted Offset: See figure below. Amplitude: 0.5 to 2 V in 10 mV steps 10 mV resolution. Offset: See figure below. 10 mV resolution. Clock outputs on/off: `Off' goes to high impedance state Data outputs on/off: `Off' goes to high impedance state Supported terminations: Supported terminations: 0 V (LVTTL, SCFL, etc.), 2 V (ECL), +1.3 V (3.3 V PECL), 0 V (LVTTL, SCFL, etc.), 2 V (ECL), +1.3 V (3.3 V PECL), AC-coupled AC-coupled Transition time (1090%): < 42 ps, < 35 ps typical Jitter (pk-pk): < 20 ps, < 12 ps typical (w/internal source) (25C, 3 GHz) Transition time (1090%): < 42 ps, < 30 ps typical (25C) Interface: DC-coupled 50 reverse terminated, APC-3.5 Variable crossover: Supported connector Clock/data delay range: 01 bit period or 10 ns, Intrinsic Clock to data delay is constant at all frequencies. whichever is less. 1 ps resolution. Interface: DC-coupled 50 reverse terminated, Data/Data/Clock/Clock Amplitudes and Offsets APC-3.5 connector
0.5 min to 2 V max Termination: 2 V Maximum High Level: 0 V or Minimum Low Level: 3 V 0 V +1.3 V 2.5 V 2.5 V 3 V 3 V
Auxiliary input
This has two functions. 1. Blanks the data outputs to allow the user to create bursts of data 2. If in Alternating Pattern mode, used to change between `A' and `B' patterns Minimum pulse width: 128 clock periods Interface: TTL compatible, 50 BNC female connector
Clock input
Allows connection of an external clock source in order to extend the operating range of the instrument. Recommended clock sources are the Agilent E4422B and the 83752A. Frequency range: 50 MHz to 3.6 GHz Amplitude range: +3 dBm to 3 dBm Interface: SMA female 50 , DC coupled to 0 V
Trigger output Error add input
This allows injection of single errors by an external pulse generator into the transmitted test pattern synchronous with the rising edge of the pulse Minimum pulse width: 128 clock periods Interface: TTL compatible, 50 BNC female connector Provides a pulse to trigger a communication analyzer etc. It has two modes: 1. Divided Clock mode: pulses at 1/8th of the clock rate. 2. Pattern mode: pulse at a settable bit position within the pattern. Min.pulse width: (Pattern mode) 64 bits Output levels: High 0.3 V, Low 0.8 V Interface: 50 SMA female
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