|Category||Multimedia => Audio => Processors|
|Description||20-bit Audio Codec With DSP And Delay RAM|
|Company||AKM Semiconductor, Inc.|
|Datasheet||Download AK7714 datasheet
|Cross ref.||Similar parts: AD1953|
The is a highly integrated audio processing IC with 20-bit stereo ADC and 4-channel DAC plus on-chip DSP with 64-kbit delay RAM. The built-in ADC has a dynamic range 99 dB with S/(N+D) of 92 dB, and the DAC has a dynamic range 98 dB with S/(N+D) of 89 dB, thereby ensuring high performances. The AK7714 is compatible with each of the sampling frequencies of 48 kHz, 44.1 kHz or 32 kHz, and a program of 512 steps (when sampling at 44.1 kHz or 32 kHz) can be executed in one sampling time. The is a programmable audio DSP containing RAM for delay. This allows sound field control programs to be implemented for surround sound, echo 3D, parametric equalizer and the like. Furthermore, the AK7714 uses a small 100-pin LQFP package, providing the optimum system for the sound field of car audio equipment which is required to meet space saving requirements.Features
DSP: Word length: 24-bit (Data RAM) Instruction cycle time: 44.2 ns Multiplier: 16 40-bit Divider: 24 16-bit ALU: 34-bit arithmetic operation (Overflow margin: 4 bits) 24-bit arithmetic and logic operation and 15 bits shifted left - Shift+Register: and 15 bits shifted right ( )Numbers in parentheses are restricted. Provided with indirect shift function 32-bit - Program RAM: - Coefficient RAM: 24-bit - Data RAM: - Internal delay memory: 24-bit 32 kHz to 48 kHz - Sampling frequency: - Serial micro controller interface (512 fs for sampling at 44.1 kHz or 32 kHz) - Master clock: - Master/slave operation - Serial signal input port to 6 ch), output port to 6 ch) : 16/20/24-bit ADC: 2 channels 64 x Over-sampling delta sigma - DR, S/N dB - S/(N+D) dB - Digital HPF (fc = 1 Hz) DAC: 4 channels 128 x Over-sampling delta sigma - DR, S/N dB - S/(N+D) 89 dB Others ±5% - Power voltage: - Operating temperature range: +85 °C Package: 100-pin LQFP (0.5 mm pitch) -For standard operation (Internal connection mode, to C7: initial settings)
CPCL C7 :L Internal connection mode :All 0 (Initial settings)
This block diagram is a simplified illustration of the it is not a circuit diagram.
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