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Part: 6817
Category:
Power Management
Description:
Company: Allegro Micro Systems, Inc.
Datasheet: Download 6817 datasheet File size : 74 kB
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Datasheet text preview:
6817
OUTPUT ENABLE B LOGIC SUPPLY OUTPUT ENABLE A
ADDRESSABLE 28-LINE DECODER/DRIVER
Intended for use in ink-jet printer applications, the A6817SEP addressable 28-line decoder/driver combines low-power CMOS inputs and logic with 28 high-current, high-voltage bipolar outputs. A 4-to-14 line decoder determines the selected output driver (n) in each 14-driver bank. Two independent output-enable inputs (active low) then provide the final decoding to activate 1- or 2-of-28 outputs (OUTAn and/or OUTBn). Special internal circuitry is programmed at the time of manufacture to adjust the output pulse timing and thereby the energy the device delivers to the ink-jet print head. The DABiC-IV A6817SEP directly replaces the original BiMOS-II A5817SEP in most applications. The CMOS inputs cause minimal loading and are compatible with standard CMOS, PMOS, and NMOS logic. Use with TTL or DTL circuits may require appropriate pull-up resistors to ensure an input logic high. The internal CMOS logic operates from a 5 V supply. A CHIP ENABLE function is provided to lock out the drivers during system power up. The 28 bipolar power outputs are open-collector 30 V Darlington drivers capable of sinking 500 mA at ambient temperatures up to 85°C. The A6817SEP is furnished in a 44-lead plastic chip carrier (quad pack) for minimum-area, surface-mount applications.
CHIP ENABLE IN D (MSB) IN A (LSB)
Data Sheet 26186.22*
OUT B0
GND
43
GND 42
IN C
IN B
41
OUTB1 OUTB2 OUTB3 OUTB4 OUTB5 OUTB6 OUTB7 OUTB8 OUTB9 GND IC
7 8 9 10 11 12 13 14 15 16 17
OUTPUT DRIVER BANK B OUTPUT DRIVER BANK A
V
DD
44
40
6
5
4
3
2
1
39 38 37 36 35 34 33 32 31 30 29
OUTA0 OUTA1 OUTA2 OUTA3 OUTA4 OUTA5 OUTA6 OUTA7 OUTA8 OUTA9 GND
4-TO-14 LINE DECODER
25
19
20
18
21
22
23
24
OUTB11
OUTB10
OUTB13
OUTA11
A13
26
OUT B12
OUTA12
A10 OUT
IC
IC
27
OUT
NC
28
Dwg. PP-050
FEATURES
ABSOLUTE MAXIMUM RATINGS at TA = 25°C
Output Voltage, VCE ..... 30 V Logic Supply Voltage, VDD ......... 7.0 V Input Voltage Range, VIN ..... -0.3 V to VDD + 0.3 V Output Current, IC ... 600 mA Package Power Dissipation, PD ..... 2.70 W* Operating Temperature Range, TA ......... -20°C to +85°C Storage Temperature Range, TS ...... -55°C to +150°C
*Derate at rate of 22 mW/°C above TA = 25°C.
I Controlled Characteristics for Ink-Jet Printers I Addressable Data Entry I 30 V Minimum V(BR)CEX I CMOS, PMOS, NMOS Compatible Inputs I Low-Power CMOS Logic
Caution: These CMOS devices have input static protection (Class 2) but are still susceptible to damage when exposed to extremely high static electrical charges.
Always order by complete part number: A6817SEP .
6817 ADDRESSABLE 28-LINE DECODER/DRIVER
FUNCTIONAL BLOCK DIAGRAM
OUTPUT ENABLE A OUTPUT ENABLE B OUT B11 OUT B12
OUTN
LOGIC SUPPLY
CHIP ENABLE
IN D (MSB)
IN A (LSB)
IN B
IN C
TURN-ON DELAY
4-TO-14 LINE DECODER
OUT A13
A2
OUT A12
A0
B0
OUT A1
OUT B1
B2
OUTA11
Dwg. FP-032
TYPICAL INPUT CIRCUIT
VDD
TYPICAL OUTPUT DRIVER
IN
Dwg. EP-021-7
Dwg. EP-010-1
115 Northeast Cutoff, Box 15036 W orcester, Massachusetts 01615-0036 (508) 853-5000 Copyright © 1997, 2000 Allegro MicroSystems, Inc.
OUTB13
OUT
OUT
OUT
OUT
TURN-ON DELAY
6817 ADDRESSABLE 28-LINE DECODER/DRIVER
ELECTRICAL CHARACTERISTICS at TA = +25°C, VDD = 5.0 V.
Limits Characteristic Output Drivers Output Leakage Current Output Saturation Voltage ICEX V CE(SAT) VCE = 30 V IOUT = 450 mA IOUT = 400 mA Output Breakdown Voltage Unclamped Inductive Load Current Turn-On Time Fall Time Turn-Off Time Rise Time Control Logic Logic Input Voltage V IN(1) V IN(0) Logic Input Current II N ( 1 ) II N ( 0 ) Input Resistance Supply Current R IN I DD(ON) ID D ( O F F ) Two Outputs ON All Drivers OFF, All Inputs = 0 V, OEA = OEB = VDD VIN = 5.0 V VIN = 0 V 3.5 -- -- -- 50 -- -- -- -- <1.0 <-1.0 -- 6.0 -- -- 0.8 100 -100 -- 10.0 600 V V µA µA k mA µA V (BR)CEX -- tP H L tf tP L H tr RL = 56 VCC = 30 V, L = 3 µH, RL = 56 , IL = 500 mA, Test Fig. VCC = 21 V, RL = 39 VCC = 21 V, RL = 39 VCC = 21 V, RL = 39 VCC = 21 V, RL = 39 25 -- 50 -- -- 0.80 0.75 30 <1.0 1.10 1.05 -- See Note 100 20 125 50 425 -- 350 -- 100 1.40 1.35 -- µA V V V -- ns ns ns ns Symbol Test Conditions Min Typ Max Units
Note: Device will turn off and meet all specifications after test.
www.allegromicro.com
6817 ADDRESSABLE 28-LINE DECODER/DRIVER
OUTN
L
R V CC IL
Dwg. EP-044
UNCLAMPED INDUCTIVE LOAD CURRENT TEST FIGURE
A
INA-D
B
t ENABLE
OUTPUT ENABLE (A and/or B)
t PHL
90% OUTPUT VOLTAGE N 50% 10%
t OUT
t PLH
50%
90% 10%
tf
tr
Dwg. WP-017
TIMING CONDITIONS
(Logic Levels are VDD and Ground)
A. Minimum Data Active Time Before Output Enable (Data Set-Up Time) ... 150 ns B. Minimum Data Hold Time After Output Enable (Data Hold Time) ............ 250 ns
115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
6817 ADDRESSABLE 28-LINE DECODER/DRIVER
APPLICATIONS INFORMATION
This device is intended specifically for, although certainly not limited to, driving ink-jet print heads. In this application, a certain minimum energy (a function of load voltage and output pulse duration) is required for proper operation, while excessive energy will degrade the life of the print head. The output pulse duration (tOUT) is equal to tENABLE + tPLH tPHL, where tPHL is adjusted during manufacture to compensate for variations in the output saturation voltage (VCE(SAT)). For the A6817SEP, the relationship between tOUT and tENABLE at TA = 25°C is: tOUT = tENABLE ([VCE(SAT)(actual) VCE(SAT)(typical)] x 330 ns) + 25 ns + 110 ns. For most applications, this will result in a drivercontribution-to-energy-error of less than ±4%. A logic low on the CHIP ENABLE input will prevent the drivers from turning ON, regardless of the state of other inputs or the logic supply voltage. The CHIP ENABLE input has a slow response time and should not be used as a high-speed control line. For proper operation, all ground terminals should be connected to a common ground on the printed wiring board. The IC (Internal Connection) terminals are used to program the turn-on time of the device and MUST be left electrically unconnected (floating) for proper operation.
IND (MSB) 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
DECODER TRUTH TABLE
INC INB INA (LSB) 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 N 0 1 2 3 4 5 6 7 8 9 10 11 12 13 ALL OFF ALL OFF
0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
Depending on the four address inputs, the 4-to-14 line decoder selects one driver from each of the 14 output A and B banks of sink drivers according to the Decoder Truth Table. The state of the selected outputs is determined by the OUTPUT ENABLE inputs as shown in the Enable Truth Table.
ENABLE TRUTH TABLE
CHIP ENABLE 0 1 1 1 1 X = Irrelevant OUTPUT E N A B L EA X 1 0 1 0 OUTPUT E N A B L EB X 1 1 0 0 OUTPUTS (OFF unless otherwise specified. For the value of N see the Decoder Truth Table) ALL OFF ALL OFF OUTAN ON OUTBN ON OUTAN ON, OUTBN ON
www.allegromicro.com
Others parts begin by 68
68-1 68-2 68-3
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