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Details, datasheet, quote on part number:A3964SB
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Datasheet text preview:
3964
A3964SLB
OUT 1B SENSE 1 OUT 1A LOAD SUPPLY GROUND GROUND V REF(IN) RC 1 PHASE 1 ENABLE 1 1 2 3 V BB 4 5 6 7 9 8 V CC 1 2 20 19 18 17 16 15 14 OUT 2B SENSE 2 OUT 2A LOGIC SUPPLY GROUND GROUND V REF(OUT) RC 2 PHASE 2 ENABLE 2
DUAL FULL-BRIDGE PWM MOTOR DRIVER
Designed for pulse-width modulated (PWM) current control of bipolar stepper motors, the A3964SB and A3964SLB are capable of continuous output currents to ±800 mA and operating voltages to 30 V. Internal fixed off-time PWM current-control circuitry can be used to regulate the maximum load current to a desired value. An internal precision voltage reference is provided to improve motor peak-current control accuracy. The peak load current limit is set by the user's selection of an external resistor divider and current-sensing resistors. The fixed off-time pulse duration is set by user-selected external RC timing networks. The capacitor in the RC timing network also determines a user-selectable blanking window that prevents false triggering of the PWM current control circuitry during switching transitions. This eliminates the need for two external RC filter networks on the current-sensing comparator inputs. For each bridge the PHASE input controls load current polarity by selecting the appropriate source and sink driver pair. For each bridge the ENABLE input, when held high, disables the output drivers. Special powerup sequencing is not required. Internal circuit protection includes thermal shutdown with hysteresis, transient-suppression diodes, and crossover-current protection. The A3964SB is supplied in a 24-pin plastic DIP with copper heat sink tabs; A3964SLB is supplied in a 20-lead plastic SOIC with copper heat sink tabs. The power tabs are at ground potential and need no electrical isolation.
Data Sheet 29319.28
PWM 2
13
2
9 10
1
PWM 1
12 11
Dwg. PP-047-1
ABSOLUTE MAXIMUM RATINGS
Load Supply Voltage, VBB . . . . . . . . . 33 V Output Current, IOUT (10 µs) . . . . . . ±1.0 A* (continuous) . . . . . . . . . . . . . ±800 mA* Logic Supply Voltage, VCC . . . . . . . . . 7.0 V Logic Input Voltage Range, VIN . . . . . . . . . . . -0.3 V to VCC + 0.3 V Sense Voltage, VS . . . . . . . . . . . . . . . 1.0 V Reference Output Current, IREF(OUT) . . . . . . . . . . . . . . . . . . 1.0 mA Package Power Dissipation, PD . . . . . . . . . . . . . . . . . . . . See Graph Operating Temperature Range, TA . . . . . . . . . . . . . . . . -20°C to +85°C Junction Temperature, TJ . . . . . . . +150°C Storage Temperature Range, TS . . . . . . . . . . . . . . . -55°C to +150°C
* Output current rating may be limited by duty cycle, ambient temperature, and heat sinking. Under any set of conditions, do not exceed the specified current rating or a junction temperature of 150°C. Fault conditions that produce excessive junction temperature will activate the device's thermal shutdown circuitry. These conditions can be tolerated but should be avoided.
FEATURES
I I I I I I I ± 800 mA Continuous Output Current Rating 30 V Output Voltage Rating Internal PWM Current Control, Saturated Sink Drivers Internally Generated, Precision 2.5 V Reference Internal Transient-Suppression Diodes Internal Thermal-Shutdown Circuitry Crossover-Current Protection, UVLO Protection
Always order by complete part number: Part Number A3964SB A3964SLB Package 24-Pin DIP 20-Lead Wide-Body SOIC
3964 DUAL FULL-BRIDGE PWM MOTOR DRIVER
A3964SB
ALLOWABLE PACKAGE POWER DISSIPATION IN WATTS
5
RJT = 6.0°C/W
NO CONNECT. OUT 1B SENSE 1 OUT 1A
1 2 3 4
NC
NC
24 23
NO CONNECT. OUT 2B SENSE 2 OUT 2A LOGIC SUPPLY GROUND GROUND V REF(OUT) RC 2 PHASE 2 ENABLE 2 NO CONNECT.
4
1
2
22 21
3
SUFFIX 'B', R JA = 40°C/W
LOAD SUPPLY GROUND GROUND V REF(IN)
VBB 5 6 7 8 9 9
PWM 1 PWM 2
V CC
20 19 18 17 16
2
1
SUFFIX 'LB', R JA = 60°C/W
RC 1 PHASE 1 ENABLE 1
10 11 12
1
2
15 14
0 25 50 75 100 TEMPERATURE IN °C 125 150
Dwg. GP-049-4
NO CONNECT.
NC
NC
13
Dwg. PP-005-2
FUNCTIONAL BLOCK DIAGRAM (A3964SLB pinning shown)
LOGIC SUPPLY OUT 1B LOAD SUPPLY OUT 2A OUT 1A OUT 2B
17 VCC
3
1
4
18
20
UVLO & TSD VBB
PWM 1
1
2
ENABLE1 10
PWM 2
PHASE 1
9
12
PHASE 2
11
ENABLE 2
SOURCE DISABLE +
2.5 V REFERENCE
SOURCE DISABLE V REF(IN) +
ONE SHOT
ONE SHOT
REF OUT
RC1
RT CT
RA RS
RB
RS
RC2
RT
Dwg. FP-033-1
5 6 15 16
SENSE 2
8
SENSE 1
2
14
REF IN
7
19
13
CT
2
115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright © 1997, 2000 Allegro MicroSystems, Inc.
3964 DUAL FULL-BRIDGE PWM MOTOR DRIVER
TRUTH TABLE
ENABLE H L L PHASE X H L OUT A Off H L OUT B Off L H
X = Irrelevant
ELECTRICAL CHARACTERISTICS at TA = +25°C, VBB = 30 V, VCC = 4.75 V to 5.25 V, VS = 0 V, 30 k & 1000 pF RC to Ground (unless noted otherwise)
Limits Characteristic Symbol Test Conditions Min. Typ. Max. Units
Output Drivers
Load Supply Voltage Range Output Sustaining Voltage Output Leakage Current V BB VC E ( s u s ) IC E X Operating, IOUT = ±800 mA, L = 3 mH IOUT = ±800 mA, L = 3 mH, VBB = 33 V VOUT = VBB = 33 V VOUT = 0 V, VBB = 33 V Output Saturation Voltage V CE(SAT) Source Driver, IOUT = -500 mA Source Driver, IOUT = -750 mA Source Driver, IOUT = -800 mA Sink Driver, IOUT = +500 mA Sink Driver, IOUT = +750 mA Sink Driver, IOUT = +800 mA Clamp Diode Forward Voltage (Sink or Source) VF IF = 500 mA IF = 750 mA IF = 800 mA Motor Supply Current (No Load) I BB(ON) IB B ( O F F ) VENABLE = 0.8 V VENABLE = 2.4 V 5.0 33 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- <1.0 <1.0 1.0 1.1 -- 0.3 0.5 -- 1.1 1.3 -- 2.0 0 30 -- 50 -50 1.2 1.5 1.7 0.6 1.2 1.5 1.4 1.6 1.7 4.0 500 V V µA µA V V V V V V V V V mA µA
NOTES: 1. Typical Data is for design information only. 2. Negative current is defined as coming out of (sourcing) the specified device terminal.
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3964 DUAL FULL-BRIDGE PWM MOTOR DRIVER
ELECTRICAL CHARACTERISTICS at TA = +25°C, VBB = 30 V, VCC = 4.75 V to 5.25 V, VSENSE = 0 V, 30 k & 1000 pF RC to Ground (unless noted otherwise) (cont.)
Limits Characteristic Symbol Test Conditions Min. Typ. Max. Units
Control Logic
Logic Supply Voltage Range Logic Input Voltage VCC V IN(1) V IN(0) Logic Input Current II N ( 1 ) II N ( 0 ) Reference Output Voltage Reference Output Current Ref. Input Offset Current Comparator Input Offset Volt. Comparator Input Volt. Range PWM RC Fixed Off-time PWM Propagation Delay Time PWM Minimum On Time Propagation Delay Times VREF(OUT) IR E F ( O U T ) I OS VIO VR E F tOFF RC tP W M tO N ( m i n ) tp d VIN = 2.4 V VIN = 0.8 V VCC = 5.0 V, IREF(OUT) = 90 to 900 µA 3 k RD = RA + RB 15 k VREF(IN) = 1 V VREF(IN) = 0 V Operating CT = 1000 pF, RT = 30 k Comparator Trip to Source Off CT = 1000 pF, RT 15 k, VCC = 5 V IOUT = ±800 mA, 50% to 90%: ENABLE On to Source On ENABLE Off to Source Off ENABLE On to Sink On ENABLE Off to Sink Off PHASE Change to Sink On PHASE Change to Source On PHASE Change to Sink Off PHASE Change to Source Off Operating 4.75 2.4 -- -- -- 2.45 150 -2.5 -6.0 -0.3 27 -- -- -- -- -- -- -- -- -- -- -- -- D e c r e a s i n g VC C UVLO Enable Volt. - UVLO Disable Volt. I n c r e a s i n g V CC I CC(ON) IC C ( O F F ) Logic Supply Current Temperature Coefficient IC C ( O N ) VENABLE 1 = VENABLE 2 = 0.8 V VENABLE 1 = VENABLE 2 = 2.4 V VENABLE 1 = VENABLE 2 = 0.8 V 4.20 0.075 4.375 -- -- -- -- -- -- <1.0 <-2.0 2.50 -- 0 0 -- 30 1.2 2.5 3.2 1.2 3.2 0.7 3.2 3.2 0.7 1.2 165 15 4.40 0.125 4.525 60 13 0.18 5.25 -- 0.8 20 -200 2.55 900 1.0 6.0 1.0 33 2.0 3.6 -- -- -- -- -- -- -- -- -- -- 4.65 0.175 4.725 85 17 -- V V V µA µA V µA µA mV V µs µs µs µs µs µs µs µs µs µs µs °C °C V V V mA mA m A /° C
Thermal Shutdown Temp. Thermal Shutdown Hysteresis UVLO Disable Threshold UVLO Hysteresis UVLO Enable Threshold Logic Supply Current
TJ TJ
NOTES: 1. Typical Data is for design information only. 2. Negative current is defined as coming out of (sourcing) the specified device terminal.
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115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
3964 DUAL FULL-BRIDGE PWM MOTOR DRIVER
FUNCTIONAL DESCRIPTION
Internal PWM Current Control. The A3964SB and A3964SLB contain a fixed off-time pulse-width modulated (PWM) current-control circuit that can be used to limit the load current to a desired value. The peak value of the current limiting (ITRIP) is set by the selection of an external current-sensing resistor (RS) and reference input voltage (VREF(IN)). The internal circuitry compares the voltage across the external sense resistor to the voltage on the reference input terminal (VREF(IN)) resulting in a transconductance function approximated by: I TRIP VREF(IN) RS prevent false over-current detections due to reverserecovery currents of the clamp diodes, and/or switching transients related to distributed capacitance in the load. During internal PWM operation, at the end of the tOFF time, the comparator's output is blanked and CT begins to be charged from approximately 1.1 volts by an internal current source of approximately 1 mA. The comparator output remains blanked until the voltage on CT reaches approximately 3 volts. When a transition of the PHASE input occurs, CT is discharged to near ground during the crossover delay time (the crossover delay time is present to prevent simultaneous conduction of the source and sink drivers). After the crossover delay, CT is charged by an internal current source of approximately 1 mA. The comparator output remains blanked until the voltage on CT reaches approximately 3 volts. When the device is disabled, via the ENABLE input, CT is discharged to near ground. When the device is re-enabled, CT is charged by an internal current source of approximately 1 mA. The comparator output remains blanked until the voltage on CT reaches approximately 3 volts. The minimum recommended value for CT is 1000 pF. This value ensures that the blanking time is sufficient to avoid false trips of the comparator under normal operating conditions. For optimal regulation of the load current, the above value for CT is recommended and the value of RT can be sized to determine tOFF. For more information regarding load current regulation, see below. Load Current Regulation. Because the device operates in a slow current-decay mode (2-quadrant PWM mode), there is a limit to the lowest level that the PWM current control circuitry can regulate load current. The limitation is due to the minimum PWM duty cycle, which is a function of the user-selected value of tOFF and the minimum on-time pulse tON(min)max that occurs each time the PWM latch is reset. If the motor is not rotating, as in the case of a stepper motor in hold/detent mode, a brush dc motor when stalled or at startup, the worst case value of current regulation can be approximated by:
The reference input voltage is typically set with a resistor divider from VREF(OUT). To ensure proper operation of the voltage reference, the resistor divider should have an impedance of 3 k to 15 k (RD = RA+RB). Within this range, a low impedance will minimize the effect of the REF IN input offset current. The current-control circuitry limits the load current as follows: when the load current reaches ITRIP, the comparator resets a latch that turns off the selected source driver. The load inductance causes the current to recirculate through the sink driver and flyback diode. For each bridge, the user selects an external resistor (RT) and capacitor (CT) to determine the time period (tOFF = RTCT) during which the source driver remains disabled (see "RC Fixed Off-time" below). The range of recommended values for CT and RT are 1000 pF to 1500 pF and 15 k to 100 k respectively. For optimal load current regulation, CT is normally set to 1000 pF (see "Load Current Regulation" below). At the end of the RC interval, the source driver is enabled allowing the load current to increase again. The PWM cycle repeats, maintaining the peak load current at the desired value. RC Blanking. In addition to determining the fixed off-time of the PWM control circuit, the CT component sets the comparator blanking time. This function blanks the output of the comparator when the outputs are switched by the internal current-control circuitry (or by the PHASE or ENABLE inputs). The comparator output is blanked to I AVG
[(VBB VSAT(SOURCE+SINK)) x tON(min)max] [1.05 (VSAT(SINK) + VF) x tOFF] 1.05 (tON(min)max + tOFF) x RLOAD
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