|Description||8-Bit Serial-input,constant-current Latched Led Driver|
|Company||Allegro Micro Systems, Inc.|
|Datasheet||Download A6275SLW datasheet
GROUND SERIAL DATA IN CLOCK LATCH ENABLE OUT 0 OUT 1 OUT 2 OUT CK L REGISTER LATCHES OE VDD IO REGULATOR LOGIC SUPPLY REXT SERIAL DATA OUT OUTPUT ENABLE OUT 7 OUT 6 OUT 5 OUT 4
The A6275EA and A6275ELW are specifically designed for LEDdisplay applications. Each BiCMOS device includes an 8-bit CMOS shift register, accompanying data latches, and eight npn constantcurrent sink drivers. Except for package style and allowable package power dissipation, the two devices are identical. The CMOS shift register and latches allow direct interfacing with microprocessor-based systems. With 5 V logic supply, typical serial data-input rates are to 20 MHz. The LED drive current is determined by the user's selection of a single resistor. A CMOS serial data output permits cascade connections in applications requiring additional drive lines. For inter-digit blanking, all output drivers can be disabled with an ENABLE input high. Similar 150 mA output devices are available as the A6277EA and A6277ELW; similar 16-bit devices are available as the A6276EA and A6276ELW. Two package styles are provided for through-hole DIP (suffix A) or surface-mount SOIC (suffix LW). Under normal applications, copper lead frames and low logic-power dissipation allow these devices to sink maximum rated current through all outputs continuously over the operating temperature range (90 mA, 0.9 V drop, +85°C). Both devices are also available for operation over the standard temperature range +85°C. To order, change the suffix letter `E' to `S'.
Note that the A6275EA (DIP) and the A6275ELW (SOIC) are electrically identical and share a common terminal number assignment.
Supply Voltage, VDD...................... 7.0 V Output Voltage Range, VO............................ +17 V Output Current, IO........................ 90 mA Ground Current, IGND................. 750 mA Input Voltage Range, VI.................... V to VDD 0.4 V Package Power Dissipation, PD..................................... See Graph Operating Temperature Range, TA............................. to +85°C Storage Temperature Range, TS........................... to +150°C
Caution: These CMOS devices have input static protection (Class 2) but are still susceptible to damage if exposed to extremely high static electrical charges.FEATURES
90 mA Constant-Current Outputs Under-Voltage Lockout Low-Power CMOS Logic and Latches High Data Input Rate Pin-Compatible with TB62705CPAlways order by complete part number, e.g., A6275EA.
LATCHES OUTPUT ENABLE (ACTIVE LOW) MOS BIPOLAR
115 Northeast Cutoff, Box 15036 Worcester, Massachusetts (508) 853-5000 Copyright 2000, 2001 Allegro MicroSystems, Inc.
Serial Shift Register Contents Data Clock Input RN X Serial Latch Data Enable Output Input L = Low Logic (Voltage) Level H = High Logic (Voltage) Level X X... Latch Contents I2 I3...
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