Details, datasheet, quote on part number: A6B595KLW
PartA6B595KLW
Category
Description8-Bit Serial-input Latched Dmos Power Drivers
CompanyAllegro Micro Systems, Inc.
DatasheetDownload A6B595KLW datasheet
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Features, Applications

NO CONNECTION LOGIC SUPPLY SERIAL DATA IN OUT 0 OUT 1 OUT 2 OUT 3 REGISTER CLEAR OUTPUT ENABLE GROUND NO CONNECTION GROUND SERIAL DATA OUT 7 OUT 6 OUT 5 OUT 4 CLOCK STROBE GROUND

The A6B595KA and A6B595KLW combine an 8-bit CMOS shift register and accompanying data latches, control circuitry, and DMOS power driver outputs. Power driver applications include relays, solenoids, and other medium-current or high-voltage peripheral power loads. The serial-data input, CMOS shift register and latches allow direct interfacing with microprocessor-based systems. Serial-data input rates are over 5 MHz. Use with TTL may require appropriate pull-up resistors to ensure an input logic high. A CMOS serial-data output enables cascade connections in applications requiring additional drive lines. Similar devices with reduced rDS(on) are available as the A6595KA and A6595KLW. The A6B595 DMOS open-drain outputs are capable of sinking to 500 mA. All of the output drivers are disabled (the DMOS sink drivers turned off) by the OUTPUT ENABLE input high. The A6B595KA is furnished a 20-pin dual in-line plastic package. The A6B595KLW is furnished in a wide-body, small-outline plastic package (SOIC) with gull-wing leads. Copper lead frames, reduced supply current requirements, and low on-state resistance allow both devices to sink 150 mA from all outputs continuously, to ambient temperatures over 85C.

Note that the A6B595KA (DIP) and the A6B595KLW (SOIC) are electrically identical and share a common terminal number assignment.

Output Voltage, VO............................... 50 V Output Drain Current, Continuous, IO.......................... 150 mA* Peak, IOM................................... 500 mA Single-Pulse Avalanche Energy, EAS................................................. 30 mJ Logic Supply Voltage, VDD.................. 7.0 V Input Voltage Range, VI................................... +7.0 V Package Power Dissipation, PD........................................... See Graph Operating Temperature Range, TA................................. to +125C Storage Temperature Range, TS................................. to +150C

* Each output, all outputs on. Pulse duration 100 s, duty cycle 2%. Caution: These CMOS devices have input static protection (Class 3) but are still susceptible to damage if exposed to extremely high static electrical charges.

FEATURES

50 V Minimum Output Clamp Voltage 150 mA Output Current (all outputs simultaneously) s 5 Typical rDS(on) s Low Power Consumption s Replacements for TPIC6B595N and TPIC6B595DW

Always order by complete part number: Part Number Package A6B595KA 20-pin DIP A6B595KLW 20-lead SOIC

CLOCK SERIAL DATA IN STROBE OUTPUT ENABLE
Grounds (terminals 10, 11, and 19) must be connected together externally.

115 Northeast Cutoff, Box 15036 Worcester, Massachusetts (508) 853-5000 Copyright 1999, Allegro MicroSystems, Inc.

over operating temperature range Logic Supply Voltage Range, VDD............... 5.5 V High-Level Input Voltage, VIH............................ 0.85VDD Low-level input voltage, VIL................................. 0.15VDD

Shift Register Contents Data Clock Input I6 I7 Serial Data Output Strobe L = Low Logic Level H = High Logic Level X = Irrelevant X X....... P2 H H..... P7 H Latch Contents I6 I7 Output Enable I0 Output Contents I6 I7


 

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