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Details, datasheet, quote on part number:P1708C
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Datasheet text preview:
PRELIMINARY Specification
Alliance Semiconductor®
P1708C
Low Power Notebook LCD Panel EMI Reduction IC
FEATURES · · · · · · · FCC approved method of EMI attenuation Generates a low EMI spread spectrum of the input clock frequency Optimized for frequency range from 50MHz to 110MHz operation Internal loop filter minimizes external components and board space 4 selectable spread ranges Low inherent cycle-to-cycle jitter 3.3V operating voltage · PRODUCT DESCRIPTION The P1708C is a versatile spread spectrum frequency modulator designed specifically for a wide range of clock frequencies. The P1708C reduces electromagnetic interference (EMI) at the clock source, allowing system wide reduction of EMI of down stream (clock and data dependent signals). The P1708C allows significant system cost savings by reducing the number of circuit board layers and shielding that are traditionally required to pass EMI regulations. The P1708C modulates the output of a single PLL in order to "spread" the bandwidth of a synthesized clock, thereby decreasing the peak amplitudes of its harmonics. This results in significantly lower system EMI compared to the typical narrow band signal produced by oscillators and most clock generators. Lowering EMI by increasing a signal's bandwidth is called "spread spectrum clock generation". · · · · · CMOS/TTL compatible inputs and outputs Ultra low power CMOS design
8.46 mA @3.3V, 54 MHz 9.79 mA @3.3V, 65 MHz 12.06 mA @3.3V, 81MHz 16.51 mA @303V, 108 MHz
Supports notebook VGA and other LCD timing controller applications Pinout compatible to ICS MK1708 and Cypress CY25560 SSON/SBM pin for Spread Spectrum On/Off and Standby Mode controls Available in 8 pin SOIC and TSSOP
The P1708C uses the most efficient and optimized modulation profile approved by the FCC and is implemented by using a proprietary alldigital method. APPLICATIONS The P1708C is targeted towards notebook LCD displays, other displays using an LVDS interface, PC peripheral devices, and embedded systems. Figure 1 - P1708C Pin Diagram
CLKIN VDD VSS ModOUT
1 2 3 4
8 7 6 5
NC SR0 SR1 SSON/SBM
May, 2002 Revision C
PulseCore A Division of Alliance Semiconductor 3160 De La Cruz Blvd., Suite 200 · Santa Clara · CA · 95054 Tel (408) 748-6988 · Fax (408) 748-0009 http://www.pulsecore.com 1 of 1
PRELIMINARY Specification
Alliance Semiconductor® Figure 2 - P1708C Block Diagram
SR0 SR1 SSON VDD
P1708C
Modulation CLKIN Frequency D ivider Feedback D ivider
PLL
Phase Detector
Loop Filter
VCO
Output Divider
ModOUT
P1708C Block Diagram VSS
CLKIN Disabled Disabled Enabled Enabled
SSON/SBM 0 1 0 1
Table 1 - Standby Mode Selection Spread Spectrum ModOut PLL N/A Disabled Disabled N/A Disabled Free Running OFF Reference Disabled ON Normal Normal Table 2 - Spread Range Selection SR0 Spreading Range Modulation rate 0 +/- 1.00% (Fin/40)*62.49 KHz 1 +/- 2.00% (Fin/40)*62.49 KHz 0 +/- 0.25% (Fin/40)*62.49 KHz 1 +/- 0.75% (Fin/40)*62.49 KHz
Mode Standby Free Running Buffer Out Normal
SR1 0 0 1 1 PIN DESCRIPTION PIN # 1 Name CLKIN Type I
2 3 4 5 6 7 8
VDD VSS ModOUT SSON/SB M SR1 SR0 NC
P P O I I I NC
Description Connect to externally generated clock signal. To put the part into standby mode, disable the input clock signal to this pin and pull SSON/SBM (Pin 5) low (see Table 1). Connect to +3.3V Ground Connection. Connect to system ground. Spread Spectrum Clock Output. Spread Spectrum On / Off and Standby Mode control (see Table 1). This pin has an internal pull-up resistor. Digital logic input used to select Spreading Range (see Table 2). This pin has an internal pull-up resistor. Digital logic input used to select Spreading Range (see Table 2). This pin has an internal pull-up resistor. No Connect
PulseCore A Division of Alliance Semiconductor 3160 De La Cruz Blvd., Suite 200 · Santa Clara · CA · 95054 Tel (408) 748-6988 · Fax (408) 748-0009 http://www.pulsecore.com 2 of 2
May, 2002 Revision C
PRELIMINARY Specification
Alliance Semiconductor® Figure 3 - P1708C Schematic for Notebook VGA Application
50MHz-110MHz Pixel Clock Input from VGA Chip
0.1uF FB VDD
P1708C
Pin 8 can be tied either high or low. Or it may be left unconnected. Tie SR0 and SR1 High/Low according to spread range desired. See Table 2. External resistors are not needed to pull these pins high. Pin 5 SSON should be be left unconnected to turn on Spread Spectrum. Pull this pin low to turn Spread Spectrum OFF and enable Standby Mode (see note).
1 CLKIN 2 VDD 3 4 VSS ModOUT
P2040B 1708C
NC SR0 SR1 SSON
8 7 6 5
50MHz-110MHz EMI Reduced Pixel Clock Output
Note: To set the P1708C into Standby Mode, disable the input clock (CLKIN, Pin1) and also pull SSON/SBM (Pin 5) low (see Table 1).
May, 2002 Revision C
PulseCore A Division of Alliance Semiconductor 3160 De La Cruz Blvd., Suite 200 · Santa Clara · CA · 95054 Tel (408) 748-6988 · Fax (408) 748-0009 http://www.pulsecore.com 3 of 3
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