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Details, datasheet, quote on part number:P2040
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Datasheet text preview:
Final Product Specification
P2040
LCD Panel EMI Reduction IC
FEATURES · · · · · · · · Provides up to 20 dB of EMI suppression FCC approved method of EMI attenuation Generates a low EMI spread spectrum clock of the input frequency 40 MHz to 85 MHz input frequency range Optimized for VGA, SVGA and higher resolution XGA LCD panels Internal loop filter minimizes external components and board space 6 selectable high spread ranges, up to +/- 2% SSON control pin for spread spectrum enable and disable options · · · · · · · · 2 selectable modulation rates Low cycle-to-cycle jitter Wide operating range (3V to 5V) 16 mA output drives TTL or CMOS compatible outputs Low power CMOS design Supports most mobile graphic accelerator specifications Available in 8 pin SOIC and TSSOP
PRODUCT DESCRIPTION The P2040 is a selectable spread spectrum frequency modulator designed specifically for digital flat panel applications. The P2040 reduces electromagnetic interference (EMI) at the clock source which provides system wide reduction of EMI of all clock dependent signals. The P2040 allows significant system cost savings by reducing the number of circuit board layers and shielding that are traditionally required to pass EMI regulations. The P2040 uses the most efficient and optimized modulation profile approved by the FCC and is implemented in a proprietary alldigital method. The P2040 modulates the output of a single PLL in order to "spread" the bandwidth of a synthesized clock and, more importantly, decreases the peak amplitudes of its harmonics. This results in significantly lower system EMI compared to the typical narrow band signal produced by oscillators and most frequency generators. Lowering EMI by increasing a signal's bandwidth is called "spread spectrum clock generation". APPLICATIONS The P2040 is targeted towards digital flat panel applications for Notebook PCs, Palm-size PCs, Office Automation Equipments, and LCD Monitors Figure 1 P2040 Pin Diagram
CLKIN MRA SR1 VSS
1 2 3 4
8 7 6 5
VDD SR0 ModOUT SSON
Jan., 2001 Revision D
1 of 7
3160 De La Cruz Blvd., Suite 200 · Santa Clara · CA 95054 Tel (408) 748-6988 · Fax (408) 748-0009
http://www.pulsecore.com
Final Product Specification
P2040
Figure 2 P2040 Block Diagram
VDD
SR0 SR1 MRA SSON
Modulation
CLKIN
PLL
Frequency Divider
Feedback Divider
Phase Detector
Loop Filter
VCO
Output Divider
ModOUT
P2040 Block Diagram
VSS
Table 1 Modulation Selection MRA SR1 SR0 Spreading Range Modulation Rate 0 0 0 +/- 1.125 (Fin/40) * 34.72 KHz ** 0 0 1 +/- 1.75 (Fin/40) * 34.72 KHz 0 1 0 +/- 0.75 (Fin/40) * 34.72 KHz ** 0 1 1 +/- 1.25 (Fin/40) * 34.72 KHz ** 1 0 0 +/- 1.25 (Fin/40) * 20.83 KHz 1 0 1 +/- 2.00 (Fin/40) * 20.83 KHz 1 1 0 RESERVED RESERVED 1 1 1 RESERVED RESERVED **NOTE: THESE SETTINGS ARE NOT RECOMMENDED FOR 5.0V OPERATION Pin Description PIN # Name Type Description 1 CLKIN I External reference frequency input. Connect to externally generated reference signal. 2 MRA I Digital logic input used to select modulation rate (see Table 1). This pin has a 100K Ohm internal pull-up resistor. 3 SR1 I Digital logic input used to select Spreading Range (see Table 1). This pin has a 100K Ohm internal pull-up resistor. 4 VSS P Ground Connection. Connect to system ground. 5 SSON I Digital logic input used to enable Spread Spectrum function (Active Low). Spread Spectrum function enable when low. This pin has a 100K Ohm internal pull-low resistor. 6 ModOUT O Spread Spectrum Clock Output. 7 SR0 I Digital logic input used to select Spreading Range (see Table 1). This pin has a 100K Ohm internal pull-up resistor. 8 VDD P Connect to +3.3V or +5.0V
Jan., 2001 Revision D
2 of 7
3160 De La Cruz Blvd., Suite 200 · Santa Clara · CA 95054 Tel (408) 748-6988 · Fax (408) 748-0009
http://www.pulsecore.com
Final Product Specification
P2040
SPREAD SPECTRUM SELECTION Table 1 illustrates the possible spread spectrum options. The optimal setting should minimize system EMI to the fullest without affecting system performance. The spreading is described as a percentage deviation of the center frequency (Note: the center frequency is the frequency of the external reference input on CLKIN, Pin 1). Example: P2040 is designed for high resolution flat panel applications and is able to support XGA (1024 X 768) flat panel operating at 65MHz (Fin) clock speed. A spreading selection of SR1=1, SR0=0, and MRA=0 provides a percentage deviation of +/-0.75% (see Table 1) from Fin. This results in frequency on ModOUT being swept from 64.51 MHz to 65.49 MHz at a modulation rate of 56.24KHz (see Table 1). This particular example (see Figure 3) given here is a common EMI reduction method for notebook LCD panel and has already been implemented by most of the leading OEM and mobile graphic accelerator manufacturers. Figure 3 P2040 Application Schematic For Mobile LCD Graphics Controllers
65 MHZ From Graphics Accelerator
1 2 3 4
CLKIN MRA SR1 VSS
P2040
VDD SR0 ModOUT SSON
8 7 6 5
0.1uF VDD
Modulated 65MHz Signal W ith +/- 0.75% Deviation and Modulation Rate of 56.24 KHz. This signal is connected back to the Spread Spectrum Input Pin (SSIN) of the Graphics Accelerator.
Digi tal Control for SS enable or disable
EMC SOFTWARE SIMULATION By using PulseCore Semiconductor, Inc.'s proprietary EMC simulation software EMI-lator , radiated system level EMI analysis can be made easier to allow a quantitative assessment on PulseCore's EMI reduction products. The simulation engine of this EMC software has already been characterized to correlate with the electrical characteristics of PulseCore EMI reduction IC's. Figure 4 below is an example of the simulation result. Please visit our web site at www.pulsecore.com for information on how ® to obtain a free copy and demonstration of EMI-lator .
®
Jan., 2001 Revision D
3 of 7
3160 De La Cruz Blvd., Suite 200 · Santa Clara · CA 95054 Tel (408) 748-6988 · Fax (408) 748-0009
http://www.pulsecore.com
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