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Details, datasheet, quote on part number:P2811A
 
 
Part:P2811A
Description:
Company:Alliance Semiconductor
Datasheet:Download P2811A datasheet   File size : 55 kB
Request For quote:  Find where to buy P2811A
 



Datasheet text preview:
Preliminary January 2003
®
P2811/12/14
Low Power EMI Reduction IC Features
· · · · · FCC approved method of EMI attenuation Provides up to 15 dB EMI reduction Generates 1X, 2X, and 4X low EMI spread spectrum clock of the input frequency 1X: P2811, 2X: P2812, 4X: P2814 Optimized for input frequency range from 10 to 40 MHz P2811: 10 to 40 MHz P2812: 10 to 40 MHz P2814: 10 to 40 MHz Internal loop filter minimizes external components and board space · · · · · · · · Selectable spread options: Down Spread and Center Spread Low inherent cycle-to-cycle jitter Eight spread % selections: ±0.625% to ­3.5% 3.3 V operating voltage CMOS/TTL compatible inputs and outputs Pinout compatible with Cypress CY25811, CY25812, and CY25814 Products available for industrial temperature range Available in 8-pin SOIC and TSSOP
·
Product Description
The P28xx is a versatile spread spectrum frequency modulator designed specifically for input clock frequencies from 10 to 40 MHz (see Input/Output Frequency Range Selections). The P28xx can generate an EMI reduced clock from crystal, ceramic resonator, or system clock. The P28xx-A and P28xx-B offer various combinations of spread options and percentage deviations (see Output Frequency Deviation and Spread Option Selections section). These combinations include Down Spread, Center Spread and percentage deviation range from ±0.625% to -3.50%. The P28xx reduces electromagnetic interference (EMI) at the clock source, allowing a system wide EMI reduction for all the down stream clocks and data dependent signals. The P28xx allows significant system cost savings by reducing the number of circuit board layers, ferrite beads, shielding, and other passive components that are traditionally required to pass EMI regulations. The P28xx modulates the output of a single PLL in order to "spread" the bandwidth of a synthesized clock, thereby decreasing the peak amplitudes of its harmonics. This results in significantly lower system EMI compared to the typical narrow band signal produced by oscillators and most clock generators. Lowering EMI by increasing a signal's bandwidth is called "spread spectrum clock generation". The P28xx uses the most efficient and optimized modulation profile approved by the FCC and is implemented by using a proprietary all-digital method.
Pin Diagram
X IN 1 VSS D_C 2 3
P 2 8 1 1 A /B P 2 8 1 2 A /B P 2 8 1 4 A /B
8 7 6 5
XOUT VDD FRS M odO ut
SRS 4
Applications
The P28xx is targeted toward EMI management for memory interfaces in mobile graphic chipsets and highspeed digital applications such as PC peripheral devices, consumer electronics, and embedded controller systems.
Alliance Semiconductor
2575 Augustine Drive · Santa Clara, CA 95054 · Tel: 408.855.4900 · Fax: 408.855.4999 · www.alsc.com
Notice: The information in this document is subject to change without notice.
P2811/12/14
®
Block Diagram
D_C SRS FRS VDD
Modulation XIN XOUT Feedback Divider Crystal Oscillator Frequency Divider
PLL
Phase Detector
Loop Filter
VCO
Output Divider
ModOUT
P28XX Block Diagram VSS
Input/Output Frequency Range Selections
Pin 6 Part number P2811 (1X) Input (MHz) 10-20 20-40 Output (MHz) 10-20 20-40 P2812 (2X) Input (MHz) 10-20 20-40 Output (MHz) 20-40 40-80 P2814 (4X) Input (MHz) 10-20 20-40 Output (MHz) 40-80 80-160 Modulation rate
FRS 0 1
Input frequency / 448 Input frequency / 896
January 2003
Low Power EMI Reduction IC
Notice: The information in this document is subject to change without notice.
2 of 7
P2811/12/14
®
Output Frequency Deviation and Spread Option Selections
Part number Pin 3 D_C 0 P2811/12/14A 0 1 1 0 P2811/12/14B 0 1 1 Pin 4 SRS 0 1 0 1 0 1 0 1 Output frequency deviation and spread option -2.50% (Down) -3.50% (Down) +/-1.25% (Center) +/-1.75% (Center) -1.25% (Down) -1.75% (Down) +/-0.625% (Center) +/-0.875% (Center)
Pin Description
Pin number 1 2 3 Name XI N VSS D _C Type I P I Description Connect to externally generated clock signal or crystal. Ground Connection. Connect to system ground. Digital logic input used to select Down (LOW) or Center (HIGH) Spread Options (see Output Frequency Deviation and Spread Option Selections). This pin has an internal pull-up resistor. Spread Range Selection. Digital logic input used to select frequency deviation (see Output Frequency Deviation and Spread Option Selections). This pin has an internal pull-up resistor. Spread Spectrum clock output (see Input/Output Frequency Range Selections and Output Frequency Deviation and Spread Option Selections). Frequency Range Selection. Digital logic input used to select input frequency range (see Input/Output Frequency Range Selections). This pin has an internal pull-up resistor. Connect to +3.3 V Connect to crystal. No connect if externally generated clock signal is used.
4
SR S
I
5
ModOut
O
6
FRS
I
7 8
VD D X OUT
P I
January 2003
Low Power EMI Reduction IC
Notice: The information in this document is subject to change without notice.
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