The ˙0560 contains six N-channel power MOS FET with VDSS V in half-bridge configuration. These enhancement-mode Power MOSFET array utilizes a DMOS structure and alpha's dielectric isolated high voltage DIMOST technology. Each MOSFET provides an accurate fraction of the drain current through a current-sense terminal to be used for control or protection. The provision of a kelvin source connection eliminates problems of common source inductance. An additional second current-sense terminal of the low-side power MOSFET eases an independent current monitoring in every half bridge.
q Six dielectric isolated N-channel power MOSFET with VDSS 500 V, RDS(on) 10 q Three fast switching half-bridges q High-side power MOSFET with a current sense source q Low-side power MOSFET with two current sense sources q Integrated gate protection diodes q High density mounting q Temperature range +85░C q Package QPF - ˙0560EQ Die - ˙0560EX
q Three Phase Inverter q Suitable for motor driver and solenoid driver
Symbol K2L, K3L Description Drain terminal of the high-side MOSFET, supply terminal of the half bridge Gate terminal of the high-side MOSFET Output of the half bridge, connection ╗Source of high-side MOSFET to Drain of low-side MOSFETź Current-sense source terminal of the high-side MOSFET Kelvin source terminal of the high-side MOSFET Gate terminal of the low-side MOSFET Source terminal of the low-side MOSFET, ground terminal of the half bridge Current-sense source terminal of the low-side MOSFET Second current-sense source terminal of the low-side MOSFET Kelvin source terminal of the low-side MOSFET
Symbol VDS IDM ID1 ID2 VGS Tj Tstg Parameter Drain-to-Source Voltage Peak Drain Current = 95░C, Continuous Drain Current, VGS = 145░C, Continuous Drain Current, VGS 10 V Gate-to-Source Voltage Junction Temperature Storage Temperature -25 -55 Min Max 500 1.2 tbd 20 150 Unit ░C
Symbol V(BR)DSS RDS(on) IDSS VGS IGSS Qg Ciss Coss Crss r1 r2 VSD Rthja Parameter Drain-to-Source Breakdown Voltage Static Drain-to-Source On-Resistance Drain-to-Source Leakage Current Gate-to-Source Threshold Voltage Gate-to-Source Leakage Current Total Gate Charge Input Capacitance Output Capacitance Output Capacitance Current Sense Ratio IDxx / ICxx Current Sense Ratio IDxL / ICMx Diode Forward Voltage Thermal Resistance Junction-to-Ambient
Symbol td(on) tr td(off) tf Parameter Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Conditions